/** @file
 * Linker to be used with the HBL.
 *
 * This linker file provides the basic architecture for a projet. Stack size and
 * memory layout can be configured at will. Note that this file doesn't provide
 * a heap space since the HBL doesn't provide or use any form of dynamic
 * allocation.
 */

/*--Configuration-------------------------------------------------------------*/

/* minimal stack size */
_min_stack_size = 0x400;

/* memory layout of the chip */
MEMORY
{
	ROM (rx)  : ORIGIN = 0x08000000, LENGTH = 128K
	RAM (!rx) : ORIGIN = 0x20000000, LENGTH = 20K
}

/*--Description---------------------------------------------------------------*/

ENTRY(hdr_reset)

/* end of "RAM" Ram type memory */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* ROM adress to load data from */
_sromdata = LOADADDR(.data);

SECTIONS
{
	/* vector table, cpu will look for it at adress 0 on reset */
	.vector_table :
	{
		KEEP(*(.vector_table))
	} > ROM

	/* program code */
	.text :
	{
		. = ALIGN(4);
		*(.text)
	} > ROM

	/* const data */
	.rodata :
	{
		. = ALIGN(4);
		*(.rodata)
	} > ROM

	/* initialized data from ROM */
	.data :
	{
		. = ALIGN(4);
		_sdata = .;
		*(.data)
		. = ALIGN(4);
		_edata = .;
	} > RAM AT > ROM

	/* uninitialized data, zeroed */
	.bss :
	{
		. = ALIGN(4);
		_sbss = .;
		*(.bss)
		. = ALIGN(4);
		_ebss = .;
	} > RAM

	/* memory space allocated to stack. The stack is situated at the very end of
	 * the RAM while this section may not, thus it is only used to enforce a
	 * minimal stack size */
	.stack :
	{
		. = ALIGN(8);
		. = . + _min_stack_size;
	} > RAM
}

