diff --git a/drivers/usart_regs.h b/drivers/usart_regs.h
index 3e66200..863ae1d 100644
--- a/drivers/usart_regs.h
+++ b/drivers/usart_regs.h
@@ -11,6 +11,8 @@
 
 //--includes--------------------------------------------------------------------
 
+#include "reg.h"
+
 #include "stdint.h"
 
 
@@ -37,6 +39,18 @@ union USART_SR {
 	uint32_t word;
 };
 
+#define USART_SR_PE        reg_def( 0,  1)
+#define USART_SR_FE        reg_def( 1,  1)
+#define USART_SR_NE        reg_def( 2,  1)
+#define USART_SR_ORE       reg_def( 3,  1)
+#define USART_SR_IDLE      reg_def( 4,  1)
+#define USART_SR_RXNE      reg_def( 5,  1)
+#define USART_SR_TC        reg_def( 6,  1)
+#define USART_SR_TXE       reg_def( 7,  1)
+#define USART_SR_LBD       reg_def( 8,  1)
+#define USART_SR_CTS       reg_def( 9,  1)
+#define USART_SR_reserved1 reg_def(10, 22)
+
 union USART_DR {
 	struct __attribute__((packed)) {
 		uint32_t DR:9;
@@ -45,6 +59,9 @@ union USART_DR {
 	uint32_t word;
 };
 
+#define USART_DR_DR        reg_def( 0,  9)
+#define USART_DR_reserved1 reg_def( 9, 23)
+
 union USART_BRR {
 	struct __attribute__((packed)) {
 		uint32_t DIV_Fraction:4;
@@ -54,6 +71,10 @@ union USART_BRR {
 	uint32_t word;
 };
 
+#define USART_BRR_DIV_Fraction reg_def( 0,  4)
+#define USART_BRR_DIV_Mantissa reg_def( 4, 12)
+#define USART_BRR_reserved1    reg_def(16, 16)
+
 union USART_CR1 {
 	struct __attribute__((packed)) {
 		uint32_t SBK:1;
@@ -75,6 +96,22 @@ union USART_CR1 {
 	uint32_t word;
 };
 
+#define USART_CR1_SBK       reg_def( 0,  1)
+#define USART_CR1_RWU       reg_def( 1,  1)
+#define USART_CR1_RE        reg_def( 2,  1)
+#define USART_CR1_TE        reg_def( 3,  1)
+#define USART_CR1_IDLEIE    reg_def( 4,  1)
+#define USART_CR1_RXNEIE    reg_def( 5,  1)
+#define USART_CR1_TCIE      reg_def( 6,  1)
+#define USART_CR1_TXEIE     reg_def( 7,  1)
+#define USART_CR1_PEI       reg_def( 8,  1)
+#define USART_CR1_PS        reg_def( 9,  1)
+#define USART_CR1_PCE       reg_def(10,  1)
+#define USART_CR1_WAKE      reg_def(11,  1)
+#define USART_CR1_M         reg_def(12,  1)
+#define USART_CR1_UE        reg_def(13,  1)
+#define USART_CR1_reserved1 reg_def(14, 18)
+
 union USART_CR2 {
 	struct __attribute__((packed)) {
 		uint32_t ADD:4;
@@ -93,6 +130,19 @@ union USART_CR2 {
 	uint32_t word;
 };
 
+#define USART_CR2_ADD       reg_def( 0,  4)
+#define USART_CR2_reserved1 reg_def( 4,  1)
+#define USART_CR2_LBDL      reg_def( 5,  1)
+#define USART_CR2_LBDIE     reg_def( 6,  1)
+#define USART_CR2_reserved2 reg_def( 7,  1)
+#define USART_CR2_LBCL      reg_def( 8,  1)
+#define USART_CR2_CPHA      reg_def( 9,  1)
+#define USART_CR2_CPOL      reg_def(10,  1)
+#define USART_CR2_CLKEN     reg_def(11,  1)
+#define USART_CR2_STOP      reg_def(12,  2)
+#define USART_CR2_LINEN     reg_def(14,  1)
+#define USART_CR2_reserved3 reg_def(15, 17)
+
 union USART_CR3 {
 	struct __attribute__((packed)) {
 		uint32_t EIE:1;
@@ -111,6 +161,19 @@ union USART_CR3 {
 	uint32_t word;
 };
 
+#define UART_CR3_EIE       reg_def( 0,  1)
+#define UART_CR3_IREN      reg_def( 1,  1)
+#define UART_CR3_IRLP      reg_def( 2,  1)
+#define UART_CR3_HDSEL     reg_def( 3,  1)
+#define UART_CR3_NACK      reg_def( 4,  1)
+#define UART_CR3_SCEN      reg_def( 5,  1)
+#define UART_CR3_DMAR      reg_def( 6,  1)
+#define UART_CR3_DMAT      reg_def( 7,  1)
+#define UART_CR3_RTSE      reg_def( 8,  1)
+#define UART_CR3_CTSE      reg_def( 9,  1)
+#define UART_CR3_CTSIE     reg_def(10,  1)
+#define UART_CR3_reserved3 reg_def(11, 21)
+
 union USART_GTPR {
 	struct __attribute__((packed)) {
 		uint32_t PSC:8;
@@ -120,6 +183,10 @@ union USART_GTPR {
 	uint32_t word;
 };
 
+#define USART_GTPR_PSC       reg_def( 0,  8)
+#define USART_GTPR_GT        reg_def( 8,  8)
+#define USART_GTPR_reserved1 reg_def(16, 16)
+
 struct __attribute__((packed)) USART {
 	union USART_SR SR;
 	union USART_DR DR;