diff --git a/drivers/rcc.c b/drivers/rcc.c index dc488ec..cf99db1 100644 --- a/drivers/rcc.c +++ b/drivers/rcc.c @@ -14,6 +14,9 @@ //--local definitions----------------------------------------------------------- +#define APB1_MASK 0x3afec9ff +#define APB2_MASK 0x0038fffd + static void apply_default_preset(void); static void apply_speed_preset(void); @@ -49,6 +52,36 @@ void rcc_configure(enum RccPreset preset) regs->APB2ENR = apb2_enr; } +void rcc_enable_apb1(enum RccApb1 mask) +{ + regs->APB1ENR.word |= mask & APB1_MASK; +} + +void rcc_disable_apb1(enum RccApb1 mask) +{ + regs->APB1ENR.word &= !(mask & APB1_MASK); +} + +void rcc_reset_apb1(enum RccApb1 mask) +{ + regs->APB1RSTR.word &= !(mask & APB1_MASK); +} + +void rcc_enable_apb2(enum RccApb2 mask) +{ + regs->APB2ENR.word |= mask & APB2_MASK; +} + +void rcc_disable_apb2(enum RccApb2 mask) +{ + regs->APB2ENR.word &= !(mask & APB2_MASK); +} + +void rcc_reset_apb2(enum RccApb2 mask) +{ + regs->APB2RSTR.word &= !(mask & APB2_MASK); +} + //--local functions------------------------------------------------------------- diff --git a/drivers/rcc.h b/drivers/rcc.h index 09d71d4..30455b6 100644 --- a/drivers/rcc.h +++ b/drivers/rcc.h @@ -23,6 +23,61 @@ enum RccPreset { RCC_PRESET_SPEED, //highest clocks, uses 8MHz HSE if available }; +/** + * Available peripherals on the APB1 bus. Note that some of these peripherals + * may not be availables on all chips + */ +enum RccApb1 { + RCC_APB1_TIM2 = (0x1 << 0), + RCC_APB1_TIM3 = (0x1 << 1), + RCC_APB1_TIM4 = (0x1 << 2), + RCC_APB1_TIM5 = (0x1 << 3), + RCC_APB1_TIM6 = (0x1 << 4), + RCC_APB1_TIM7 = (0x1 << 5), + RCC_APB1_TIM12 = (0x1 << 6), + RCC_APB1_TIM13 = (0x1 << 7), + RCC_APB1_TIM14 = (0x1 << 8), + RCC_APB1_WWDG = (0x1 << 11), + RCC_APB1_SPI2 = (0x1 << 14), + RCC_APB1_SPI3 = (0x1 << 15), + RCC_APB1_USART2 = (0x1 << 17), + RCC_APB1_USART3 = (0x1 << 18), + RCC_APB1_UART4 = (0x1 << 19), + RCC_APB1_UART5 = (0x1 << 20), + RCC_APB1_I2C1 = (0x1 << 21), + RCC_APB1_I2C2 = (0x1 << 22), + RCC_APB1_USB = (0x1 << 23), + RCC_APB1_CAN = (0x1 << 25), + RCC_APB1_BKP = (0x1 << 27), + RCC_APB1_PWR = (0x1 << 28), + RCC_APB1_DAC = (0x1 << 29), +}; + +/** + * Available peripherals on the APB2 bus. Note that some of these peripherals + * may not be available on all chips + */ +enum RccApb2 { + RCC_APB2_AFOI = (0x1 << 0), + RCC_APB2_IOPA = (0x1 << 2), + RCC_APB2_IOPB = (0x1 << 3), + RCC_APB2_IOPC = (0x1 << 4), + RCC_APB2_IOPD = (0x1 << 5), + RCC_APB2_IOPE = (0x1 << 6), + RCC_APB2_IOPF = (0x1 << 7), + RCC_APB2_IOPG = (0x1 << 8), + RCC_APB2_ADC1 = (0x1 << 9), + RCC_APB2_ADC2 = (0x1 << 10), + RCC_APB2_TIM1 = (0x1 << 11), + RCC_APB2_SPI1 = (0x1 << 12), + RCC_APB2_TIM8 = (0x1 << 13), + RCC_APB2_USART = (0x1 << 14), + RCC_APB2_ADC3 = (0x1 << 15), + RCC_APB2_TIM9 = (0x1 << 19), + RCC_APB2_TIM10 = (0x1 << 20), + RCC_APB2_TIM11 = (0x1 << 21), +}; + //--functions------------------------------------------------------------------- @@ -33,6 +88,48 @@ enum RccPreset { */ void rcc_configure(enum RccPreset preset); +/** + * Enables peripherals on the APB1 bus according to the given mask. + * + * @param mask the mask for the peripherals to enable + */ +void rcc_enable_apb1(enum RccApb1 mask); + +/** + * Disables peripherals on the APB1 bus according to the given mask. + * + * @param mask the mask for the peripherals to disable + */ +void rcc_disable_apb1(enum RccApb1 mask); + +/** + * Resets peripherals on the APB1 bus according to the given mask. + * + * @param mask the mask for the peripherals to reset + */ +void rcc_reset_apb1(enum RccApb1 mask); + +/** + * Enables peripherals on the APB2 bus according to the given mask. + * + * @param mask the mask for the peripherals to enable + */ +void rcc_enable_apb2(enum RccApb2 mask); + +/** + * Disables peripherals on the APB2 bus according to the given mask. + * + * @param mask the mask for the peripherals to disable + */ +void rcc_disable_apb2(enum RccApb2 mask); + +/** + * Resets peripherals on the APB2 bus according to the given mask. + * + * @param mask the mask for the peripherals to reset + */ +void rcc_reset_apb2(enum RccApb2 mask); + #endif //_RCC_H_