First try at implementing USART's TX
Unbuffered writes are working as intented. Buffering still needs work
This commit is contained in:
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6269cf969a
commit
a66e5733e1
193
drivers/usart.c
193
drivers/usart.c
@ -8,6 +8,7 @@
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//--includes--------------------------------------------------------------------
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#include "usart.h"
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#include "nvic.h"
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#include "usart_regs.h"
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#include "reg.h"
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@ -26,15 +27,28 @@ struct CircularBuffer {
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bool dmaLooped;
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};
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struct FragmentedBuffer {
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uint8_t** buffers;
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uint16_t buffer_size;
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uint16_t byte_index;
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uint8_t buffer_nb;
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uint8_t free_buffer_nb;
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uint8_t buffer_index;
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uint8_t dma_buffer_index;
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};
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static void configure_usart(volatile struct USART* regs,
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enum UsartConfig config);
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static void configure_baudrate(volatile struct USART* regs, uint32_t clock,
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uint32_t baudrate);
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static uint32_t periph_regs(enum UsartPeriph periph,
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volatile struct USART** regs);
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static uint32_t read_from_buffer(struct CircularBuffer* buffer,
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static uint32_t write_byte(volatile struct USART* regs, uint8_t byte);
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static uint32_t write_to_buffer(volatile struct USART* regs,
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volatile struct FragmentedBuffer *buffer, enum DmaChannel channel,
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uint8_t byte);
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static uint32_t read_from_buffer(volatile struct CircularBuffer* buffer,
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enum DmaChannel channel, uint8_t* byte);
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static void usart1_tx_callback(enum DmaIRQSource src);
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static void usart1_rx_callback(enum DmaIRQSource src);
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@ -44,7 +58,8 @@ static volatile struct USART* const usart1 = (struct USART*)USART1_BASE_ADDRESS;
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static volatile struct USART* const usart2 = (struct USART*)USART2_BASE_ADDRESS;
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static volatile struct USART* const usart3 = (struct USART*)USART3_BASE_ADDRESS;
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static struct CircularBuffer usart1_rx_buffer;
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static volatile struct CircularBuffer usart1_rx_buffer;
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static volatile struct FragmentedBuffer usart1_tx_buffer;
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//--public functions------------------------------------------------------------
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@ -60,6 +75,7 @@ void usart_configure(enum UsartPeriph periph, enum UsartConfig config,
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rcc_enable(RCC_AHB_NONE, RCC_APB1_NONE, RCC_APB2_USART);
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configure_baudrate(usart1, clocks.apb2_freq, baudrate);
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configure_usart(usart1, config);
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usart1_tx_buffer.buffers = NULL;
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break;
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case USART_PERIPH_2:
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rcc_enable(RCC_AHB_NONE, RCC_APB1_USART2, RCC_APB2_NONE);
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@ -79,22 +95,35 @@ void usart_configure(enum UsartPeriph periph, enum UsartConfig config,
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uint32_t usart_write_byte(enum UsartPeriph periph, uint8_t byte)
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{
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volatile struct USART* regs;
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if (periph_regs(periph, ®s)) {
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return 1;
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volatile struct FragmentedBuffer* buffer;
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enum DmaChannel dma_channel;
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switch (periph) {
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case USART_PERIPH_1:
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regs = usart1;
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buffer = &usart1_tx_buffer;
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dma_channel = DMA_CHANNEL_4;
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break;
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case USART_PERIPH_2:
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case USART_PERIPH_3:
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default:
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return 1;
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break;
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}
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if (regs->SR.TXE) {
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if (buffer->buffers) {
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return write_to_buffer(regs, buffer, dma_channel, byte);
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} else {
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while (regs->SR.TXE == 0) {}
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reg_write(regs->DR, USART_DR_DR, byte);
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return 0;
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} else {
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return 1;
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}
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}
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uint32_t usart_read_byte(enum UsartPeriph periph, uint8_t* byte)
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{
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volatile struct USART* regs;
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struct CircularBuffer* buffer;
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volatile struct CircularBuffer* buffer;
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enum DmaChannel dma_channel;
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switch (periph) {
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@ -122,6 +151,32 @@ uint32_t usart_read_byte(enum UsartPeriph periph, uint8_t* byte)
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}
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}
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void usart_set_tx_buffer(enum UsartPeriph periph, uint8_t** buffers,
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uint16_t buffer_size, uint8_t buffer_nb)
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{
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volatile struct FragmentedBuffer* buffer = NULL;
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switch (periph) {
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case USART_PERIPH_1:
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buffer = &usart1_tx_buffer;
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break;
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case USART_PERIPH_2:
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break;
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case USART_PERIPH_3:
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break;
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}
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#warning "check for null ptr"
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// for (uint8_t i = 0; i < sizeof(struct FragmentedBuffer); ++i)
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// {
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// ((uint8_t*)(&buffer))[i] = 0;
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// }
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buffer->buffers = buffers;
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buffer->buffer_size = buffer_size;
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buffer->buffer_nb = buffer_nb;
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buffer->free_buffer_nb = buffer_nb;
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}
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void usart_set_rx_buffer(enum UsartPeriph periph, uint8_t* buffer,
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uint16_t size)
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{
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@ -148,9 +203,9 @@ void usart_set_rx_buffer(enum UsartPeriph periph, uint8_t* buffer,
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//--local functions-------------------------------------------------------------
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static void configure_usart(volatile struct USART* regs, enum UsartConfig config)
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static void configure_usart(volatile struct USART* regs,
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enum UsartConfig config)
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{
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usart1_rx_buffer.buffer = NULL;
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//configure parity
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switch (config)
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{
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@ -238,27 +293,55 @@ static void configure_baudrate(volatile struct USART* regs, uint32_t clock,
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reg_write(regs->BRR, USART_BRR_DIV_Fraction, divider & 0xF);
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}
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static uint32_t periph_regs(enum UsartPeriph periph, volatile struct USART** regs)
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static uint32_t write_byte(volatile struct USART* regs, uint8_t byte)
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{
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switch (periph) {
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case USART_PERIPH_1:
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*regs = usart1;
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break;
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case USART_PERIPH_2:
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*regs = usart2;
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break;
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case USART_PERIPH_3:
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*regs = usart3;
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break;
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default:
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return 1;
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break;
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if (regs->SR.TXE) {
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reg_write(regs->DR, USART_DR_DR, byte);
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reg_reset(regs->CR3, USART_CR3_DMAT);
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reg_set(regs->CR1, USART_CR1_TXEIE);
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nvic_enable(NVIC_IRQ_USART1);
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return 0;
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} else {
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return 1;
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}
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}
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static uint32_t write_to_buffer(volatile struct USART *regs,
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volatile struct FragmentedBuffer *buffer, enum DmaChannel channel,
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uint8_t byte)
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{
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//if the tx register is empty, there is no need to go through the dma
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if (!write_byte(regs, byte)) {
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//TODO enable IRQ
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return 0;
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}
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//if the current buffer is full, we need to switch it with an empty one
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if (buffer->byte_index >= buffer->buffer_size) {
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//if all buffer full, simply wait for the DMA to empty one
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while (buffer->free_buffer_nb == 0) {}
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dma_enter_critical(DMA_PERIPH_1, channel);
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++buffer->buffer_index;
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if (buffer->buffer_index >= buffer->buffer_nb) {
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buffer->buffer_index = 0;
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}
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--buffer->free_buffer_nb;
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buffer->byte_index = 0;
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} else {
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dma_enter_critical(DMA_PERIPH_1, channel);
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}
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buffer->buffers[buffer->buffer_index][buffer->byte_index] = byte;
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++buffer->byte_index;
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dma_exit_critical(DMA_PERIPH_1, channel);
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return 0;
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}
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static uint32_t read_from_buffer(struct CircularBuffer* buffer,
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static uint32_t read_from_buffer(volatile struct CircularBuffer* buffer,
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enum DmaChannel channel, uint8_t* byte)
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{
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uint16_t end = buffer->size - dma_get_remaining(DMA_PERIPH_1, channel);
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@ -283,9 +366,65 @@ static uint32_t read_from_buffer(struct CircularBuffer* buffer,
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//--callbacks-------------------------------------------------------------------
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static void usart1_tx_callback(enum DmaIRQSource src)
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{
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(void)src; //only transfer complete expected
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volatile struct FragmentedBuffer* buffer = &usart1_tx_buffer;
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++buffer->dma_buffer_index;
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if (buffer->dma_buffer_index >= buffer->buffer_nb) {
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buffer->dma_buffer_index = 0;
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}
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++buffer->free_buffer_nb;
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//no more data to send, stop here
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if (buffer->dma_buffer_index == buffer->buffer_index
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&& buffer->byte_index == 0) {
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return;
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}
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dma_configure(DMA_PERIPH_1, DMA_CHANNEL_4,
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DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_MEM
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| DMA_CONFIG_INC_MEM | DMA_CONFIG_PSIZE_8BITS
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| DMA_CONFIG_MSIZE_8BITS | DMA_CONFIG_PRIO_LOW,
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(void*)&usart1->DR,
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(void*)&buffer->buffers[buffer->dma_buffer_index],
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buffer->byte_index,
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usart1_tx_callback);
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}
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static void usart1_rx_callback(enum DmaIRQSource src)
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{
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(void)src; //only transfer complete expected
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usart1_rx_buffer.dmaLooped = true;
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}
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//--ISRs------------------------------------------------------------------------
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void hdr_usart1(void)
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{
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nvic_clear_pending(NVIC_IRQ_USART1);
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volatile struct FragmentedBuffer* buffer = &usart1_tx_buffer;
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//no more data to send, stop here
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if (buffer->dma_buffer_index == buffer->buffer_index
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&& buffer->byte_index == 0) {
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return;
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}
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reg_set(usart1->CR3, USART_CR3_DMAT);
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reg_reset(usart1->CR1, USART_CR1_TXEIE);
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nvic_disable(NVIC_IRQ_USART1);
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dma_configure(DMA_PERIPH_1, DMA_CHANNEL_4,
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DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_MEM
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| DMA_CONFIG_INC_MEM | DMA_CONFIG_PSIZE_8BITS
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| DMA_CONFIG_MSIZE_8BITS | DMA_CONFIG_PRIO_LOW,
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(void*)&usart1->DR,
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(void*)&buffer->buffers[buffer->dma_buffer_index],
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buffer->byte_index,
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usart1_tx_callback);
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}
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@ -46,8 +46,8 @@ uint32_t usart_write_byte(enum UsartPeriph periph, uint8_t byte);
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uint32_t usart_read_byte(enum UsartPeriph periph, uint8_t* byte);
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void usart_set_tx_buffer(enum UsartPeriph periph, uint8_t* buffer,
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uint16_t size);
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void usart_set_tx_buffer(enum UsartPeriph periph, uint8_t** buffers,
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uint16_t buffer_size, uint8_t buffer_nb);
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void usart_set_rx_buffer(enum UsartPeriph periph, uint8_t* buffer,
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uint16_t size);
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