From aeba78cfccdb22a24929b0effc5f3dc3d369c6e1 Mon Sep 17 00:00:00 2001
From: Steins7 <steinsset@gmail.com>
Date: Thu, 18 May 2023 13:49:53 +0200
Subject: [PATCH] Create usart's register map

---
 drivers/usart_regs.h | 137 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 137 insertions(+)
 create mode 100644 drivers/usart_regs.h

diff --git a/drivers/usart_regs.h b/drivers/usart_regs.h
new file mode 100644
index 0000000..3e66200
--- /dev/null
+++ b/drivers/usart_regs.h
@@ -0,0 +1,137 @@
+/** @file usart_regs.h
+ * Module defining the USART registers.
+ *
+ * Mainly made to be used by the usart module. It is recommanded to go through
+ * the functions provided by that module instead of directly using the registers
+ * defined here.
+ */
+
+#ifndef _USART_REGS_H_
+#define _USART_REGS_H_
+
+//--includes--------------------------------------------------------------------
+
+#include "stdint.h"
+
+
+//--type definitions------------------------------------------------------------
+
+#define USART1_BASE_ADDRESS 0x40013800
+#define USART2_BASE_ADDRESS 0x40004400
+#define USART3_BASE_ADDRESS 0x40004800
+
+union USART_SR {
+	struct __attribute__((packed)) {
+		uint32_t PE:1;
+		uint32_t FE:1;
+		uint32_t NE:1;
+		uint32_t ORE:1;
+		uint32_t IDLE:1;
+		uint32_t RXNE:1;
+		uint32_t TC:1;
+		uint32_t TXE:1;
+		uint32_t LBD:1;
+		uint32_t CTS:1;
+		uint32_t reserved1:22;
+	};
+	uint32_t word;
+};
+
+union USART_DR {
+	struct __attribute__((packed)) {
+		uint32_t DR:9;
+		uint32_t reserved1:23;
+	};
+	uint32_t word;
+};
+
+union USART_BRR {
+	struct __attribute__((packed)) {
+		uint32_t DIV_Fraction:4;
+		uint32_t DIV_Mantissa:12;
+		uint32_t reserved1:16;
+	};
+	uint32_t word;
+};
+
+union USART_CR1 {
+	struct __attribute__((packed)) {
+		uint32_t SBK:1;
+		uint32_t RWU:1;
+		uint32_t RE:1;
+		uint32_t TE:1;
+		uint32_t IDLEIE:1;
+		uint32_t RXNEIE:1;
+		uint32_t TCIE:1;
+		uint32_t TXEIE:1;
+		uint32_t PEI:1;
+		uint32_t PS:1;
+		uint32_t PCE:1;
+		uint32_t WAKE:1;
+		uint32_t M:1;
+		uint32_t UE:1;
+		uint32_t reserved1:18;
+	};
+	uint32_t word;
+};
+
+union USART_CR2 {
+	struct __attribute__((packed)) {
+		uint32_t ADD:4;
+		uint32_t reserved1:1;
+		uint32_t LBDL:1;
+		uint32_t LBDIE:1;
+		uint32_t reserved2:1;
+		uint32_t LBCL:1;
+		uint32_t CPHA:1;
+		uint32_t CPOL:1;
+		uint32_t CLKEN:1;
+		uint32_t STOP:2;
+		uint32_t LINEN:1;
+		uint32_t reserved3:17;
+	};
+	uint32_t word;
+};
+
+union USART_CR3 {
+	struct __attribute__((packed)) {
+		uint32_t EIE:1;
+		uint32_t IREN:1;
+		uint32_t IRLP:1;
+		uint32_t HDSEL:1;
+		uint32_t NACK:1;
+		uint32_t SCEN:1;
+		uint32_t DMAR:1;
+		uint32_t DMAT:1;
+		uint32_t RTSE:1;
+		uint32_t CTSE:1;
+		uint32_t CTSIE:1;
+		uint32_t reserved3:21;
+	};
+	uint32_t word;
+};
+
+union USART_GTPR {
+	struct __attribute__((packed)) {
+		uint32_t PSC:8;
+		uint32_t GT:8;
+		uint32_t reserved1:16;
+	};
+	uint32_t word;
+};
+
+struct __attribute__((packed)) USART {
+	union USART_SR SR;
+	union USART_DR DR;
+	union USART_BRR BRR;
+	union USART_CR1 CR1;
+	union USART_CR2 CR2;
+	union USART_CR3 CR3;
+	union USART_GTPR GTPR;
+};
+
+
+//--functions-------------------------------------------------------------------
+
+#endif //_USART_REGS_H_
+