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Merge peripheral control functions

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The functions are very simple and their number complicates the API more
than anything, so we better merge them
This commit is contained in:
Steins7 2023-03-31 23:32:43 +02:00
parent 2d83ce9f05
commit c10ef4d2f1
2 changed files with 30 additions and 62 deletions
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44
drivers/rcc.c
View File

@ -57,44 +57,26 @@ void rcc_configure(enum RccPreset preset)
regs->APB2ENR = apb2_enr;
}
void rcc_enable_ahb(enum RccAhb mask)
void rcc_enable(enum RccAhb ahb_mask, enum RccApb1 apb1_mask,
enum RccApb2 apb2_mask)
{
regs->AHBENR.word |= mask & AHB_MASK;
regs->AHBENR.word |= ahb_mask & AHB_MASK;
regs->APB1ENR.word |= apb1_mask & APB1_MASK;
regs->APB2ENR.word |= apb2_mask & APB2_MASK;
}
void rcc_disable_ahb(enum RccAhb mask)
void rcc_disable(enum RccAhb ahb_mask, enum RccApb1 apb1_mask,
enum RccApb2 apb2_mask)
{
regs->AHBENR.word &= !(mask & AHB_MASK);
regs->AHBENR.word &= !(ahb_mask & AHB_MASK);
regs->APB1ENR.word &= !(apb1_mask & APB1_MASK);
regs->APB2ENR.word &= !(apb2_mask & APB2_MASK);
}
void rcc_enable_apb1(enum RccApb1 mask)
void rcc_reset(enum RccApb1 apb1_mask, enum RccApb2 apb2_mask)
{
regs->APB1ENR.word |= mask & APB1_MASK;
}
void rcc_disable_apb1(enum RccApb1 mask)
{
regs->APB1ENR.word &= !(mask & APB1_MASK);
}
void rcc_reset_apb1(enum RccApb1 mask)
{
regs->APB1RSTR.word &= !(mask & APB1_MASK);
}
void rcc_enable_apb2(enum RccApb2 mask)
{
regs->APB2ENR.word |= mask & APB2_MASK;
}
void rcc_disable_apb2(enum RccApb2 mask)
{
regs->APB2ENR.word &= !(mask & APB2_MASK);
}
void rcc_reset_apb2(enum RccApb2 mask)
{
regs->APB2RSTR.word &= !(mask & APB2_MASK);
regs->APB1RSTR.word &= !(apb1_mask & APB1_MASK);
regs->APB2RSTR.word &= !(apb2_mask & APB2_MASK);
}

48
drivers/rcc.h
View File

@ -28,6 +28,7 @@ enum RccPreset {
* may not be availables on all chips
*/
enum RccAhb {
RCC_AHB_NONE = 0,
RCC_AHB_DMA1 = (0x1 << 0),
RCC_AHB_DMA2 = (0x1 << 1),
RCC_AHB_SRAM = (0x1 << 2),
@ -42,6 +43,7 @@ enum RccAhb {
* may not be availables on all chips
*/
enum RccApb1 {
RCC_APB1_NONE = 0,
RCC_APB1_TIM2 = (0x1 << 0),
RCC_APB1_TIM3 = (0x1 << 1),
RCC_APB1_TIM4 = (0x1 << 2),
@ -72,6 +74,7 @@ enum RccApb1 {
* may not be available on all chips
*/
enum RccApb2 {
RCC_APB2_NONE = 0,
RCC_APB2_AFOI = (0x1 << 0),
RCC_APB2_IOPA = (0x1 << 2),
RCC_APB2_IOPB = (0x1 << 3),
@ -104,44 +107,27 @@ enum RccApb2 {
void rcc_configure(enum RccPreset preset);
/**
* Enables peripherals on the AHB bus
* Enables peripherals on the different buses. The enums values can used as
* masks to enable multiple peripherals at the same time. Invalid values will be
* ignored.
*/
void rcc_enable_ahb(enum RccAhb mask);
void rcc_enable(enum RccAhb ahb_mask, enum RccApb1 apb1_mask,
enum RccApb2 apb2_mask);
/**
* Disables peripherals on the AHB bus
* Disables peripherals on the different buses. The enums values can used as
* masks to disable multiple peripherals at the same time. Invalid values will
* be ignored.
*/
void rcc_disable_ahb(enum RccAhb mask);
void rcc_disable(enum RccAhb ahb_mask, enum RccApb1 apb1_mask,
enum RccApb2 apb2_mask);
/**
* Enables peripherals on the APB1 bus
* Resets peripherals on the different buses. The enums values can used as
* masks to reset multiple peripherals at the same time. Invalid values will
* be ignored.
*/
void rcc_enable_apb1(enum RccApb1 mask);
/**
* Disables peripherals on the APB1 bus
*/
void rcc_disable_apb1(enum RccApb1 mask);
/**
* Resets peripherals on the APB1 bus
*/
void rcc_reset_apb1(enum RccApb1 mask);
/**
* Enables peripherals on the APB2 bus
*/
void rcc_enable_apb2(enum RccApb2 mask);
/**
* Disables peripherals on the APB2 bus
*/
void rcc_disable_apb2(enum RccApb2 mask);
/**
* Resets peripherals on the APB2 bus
*/
void rcc_reset_apb2(enum RccApb2 mask);
void rcc_reset(enum RccApb1 apb1_mask, enum RccApb2 apb2_mask);
#endif //_RCC_H_