Implement usart's basic function

This code doesn't work quite right yet, must most of the control system is in
place
This commit is contained in:
Steins7 2023-07-05 22:24:02 +02:00
parent 9706979028
commit c8040cf62f
2 changed files with 220 additions and 0 deletions

169
drivers/usart.c Normal file
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/** @file usart.c
* Module handling Universal Synchronous/Asynchronous Receiver/Transmitter
*
* The module provides functions to configure the usarts and read/write from/to
* it
*/
//--includes--------------------------------------------------------------------
#include "usart.h"
#include "usart_regs.h"
#include "reg.h"
#include "rcc.h"
//--local definitions-----------------------------------------------------------
static volatile struct USART* const usart1 = (struct USART*)USART1_BASE_ADDRESS;
static volatile struct USART* const usart2 = (struct USART*)USART2_BASE_ADDRESS;
static volatile struct USART* const usart3 = (struct USART*)USART3_BASE_ADDRESS;
void configure_usart(volatile struct USART* regs, enum UsartConfig config);
void configure_baudrate(volatile struct USART* regs, uint32_t clock,
uint32_t baudrate);
//--local variables-------------------------------------------------------------
//--public functions------------------------------------------------------------
void usart_configure(enum UsartPeriph periph, enum UsartConfig config,
uint32_t baudrate)
{
struct RccClocks clocks;
rcc_get_clocks(&clocks);
switch (periph) {
case USART_PERIPH_1:
rcc_enable(RCC_AHB_NONE, RCC_APB1_NONE, RCC_APB2_USART);
configure_baudrate(usart1, clocks.apb2_freq, baudrate);
configure_usart(usart1, config);
break;
case USART_PERIPH_2:
rcc_enable(RCC_AHB_NONE, RCC_APB1_USART2, RCC_APB2_NONE);
configure_baudrate(usart2, clocks.apb1_freq, baudrate);
configure_usart(usart2, config);
break;
case USART_PERIPH_3:
rcc_enable(RCC_AHB_NONE, RCC_APB1_USART3, RCC_APB2_NONE);
configure_baudrate(usart3, clocks.apb1_freq, baudrate);
configure_usart(usart3, config);
break;
default:
break;
}
}
uint8_t usart_write_byte(enum UsartPeriph periph, uint8_t byte)
{
switch (periph) {
case USART_PERIPH_1:
if (usart1->SR.TXE) {
reg_write(usart1->DR, USART_DR_DR, byte);
return 0;
} else {
return 1;
}
case USART_PERIPH_2:
case USART_PERIPH_3:
default:
break;
}
return 1;
}
//--local functions-------------------------------------------------------------
void configure_usart(volatile struct USART* regs, enum UsartConfig config)
{
//configure parity
switch (config)
{
case USART_CONFIG_7E1:
case USART_CONFIG_8E1:
case USART_CONFIG_7E2:
case USART_CONFIG_8E2:
reg_set(regs->CR1, USART_CR1_PCE);
reg_reset(regs->CR1, USART_CR1_PS);
break;
case USART_CONFIG_7O1:
case USART_CONFIG_7O2:
case USART_CONFIG_8O1:
case USART_CONFIG_8O2:
reg_set(regs->CR1, USART_CR1_PCE);
reg_set(regs->CR1, USART_CR1_PS);
break;
case USART_CONFIG_8N1:
case USART_CONFIG_8N2:
reg_reset(regs->CR1, USART_CR1_PCE);
break;
default:
break;
}
//configure bit number
switch (config)
{
case USART_CONFIG_7E1:
case USART_CONFIG_7E2:
case USART_CONFIG_7O1:
case USART_CONFIG_7O2:
case USART_CONFIG_8N1:
case USART_CONFIG_8N2:
reg_reset(regs->CR1, USART_CR1_M);
break;
case USART_CONFIG_8E2:
case USART_CONFIG_8E1:
case USART_CONFIG_8O1:
case USART_CONFIG_8O2:
reg_set(regs->CR1, USART_CR1_M);
break;
default:
break;
}
//configure stop bits
switch (config)
{
case USART_CONFIG_7E1:
case USART_CONFIG_7O1:
case USART_CONFIG_8N1:
case USART_CONFIG_8E1:
case USART_CONFIG_8O1:
reg_reset(regs->CR2, USART_CR2_STOP);
break;
case USART_CONFIG_7E2:
case USART_CONFIG_7O2:
case USART_CONFIG_8N2:
case USART_CONFIG_8E2:
case USART_CONFIG_8O2:
reg_reset(regs->CR2, USART_CR2_STOP);
reg_write(regs->CR2, USART_CR2_STOP, 2);
break;
default:
break;
}
//enable Rx/Tx
reg_set(regs->CR1, USART_CR1_TE);
reg_set(regs->CR1, USART_CR1_RE);
reg_set(regs->CR1, USART_CR1_UE);
}
void configure_baudrate(volatile struct USART* regs, uint32_t clock,
uint32_t baudrate)
{
uint32_t mantissa = clock / (baudrate * 16);
uint32_t factor = clock / baudrate;
volatile uint32_t divider = factor - (mantissa * 16);
reg_reset(regs->BRR, USART_BRR_DIV_Mantissa);
reg_write(regs->BRR, USART_BRR_DIV_Mantissa, mantissa & 0xFFF);
reg_reset(regs->BRR, USART_BRR_DIV_Fraction);
reg_write(regs->BRR, USART_BRR_DIV_Fraction, divider & 0xF);
}

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drivers/usart.h Normal file
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/** @file usart.h
* Module handling Universal Synchronous/Asynchronous Receiver/Transmitter
*
* The module provides functions to configure the usarts and read/write from/to
* it
*/
#ifndef _USART_H_
#define _USART_H_
//--includes--------------------------------------------------------------------
#include "stdint.h"
//--type definitions------------------------------------------------------------
enum UsartPeriph {
USART_PERIPH_1,
USART_PERIPH_2,
USART_PERIPH_3,
};
enum UsartConfig {
USART_CONFIG_7E1,
USART_CONFIG_7E2,
USART_CONFIG_7O1,
USART_CONFIG_7O2,
USART_CONFIG_8N1,
USART_CONFIG_8N2,
USART_CONFIG_8E1,
USART_CONFIG_8E2,
USART_CONFIG_8O1,
USART_CONFIG_8O2,
};
//--functions-------------------------------------------------------------------
void usart_configure(enum UsartPeriph periph, enum UsartConfig config,
uint32_t baudrate);
void usart_reset(enum UsartPeriph periph);
uint8_t usart_write_byte(enum UsartPeriph periph, uint8_t byte);
uint8_t usart_read_byte(enum UsartPeriph periph, uint8_t* byte);
#endif //_USART_H_