diff --git a/drivers/dma.c b/drivers/dma.c
index fd3153f..0cc80fe 100644
--- a/drivers/dma.c
+++ b/drivers/dma.c
@@ -19,7 +19,7 @@
 //--local definitions-----------------------------------------------------------
 
 static void configure_dma(volatile struct DMA* dma, enum DmaChannel channel,
-		enum DmaConfig config_mask, void* periph, void* mem,
+		enum DmaConfig config_mask, volatile void* periph, void* mem,
 		uint16_t size);
 
 
@@ -28,16 +28,16 @@ static void configure_dma(volatile struct DMA* dma, enum DmaChannel channel,
 static volatile struct DMA* const dma1 = (struct DMA*)DMA1_BASE_ADDRESS;
 static volatile struct DMA* const dma2 = (struct DMA*)DMA2_BASE_ADDRESS;
 static DmaCallback dma1_callbacks[7];
-static void* dma1_cb_params[7];
+static volatile void* dma1_cb_params[7];
 static DmaCallback dma2_callbacks[5];
-static void* dma2_cb_params[5];
+static volatile void* dma2_cb_params[5];
 
 
 //--public functions------------------------------------------------------------
 
 void dma_configure(enum DmaPeriph dma, enum DmaChannel channel,
-		enum DmaConfig config_mask, void* periph, void* mem,
-		uint16_t size, DmaCallback callback, void* cb_param)
+		enum DmaConfig config_mask, volatile void* periph, void* mem,
+		uint16_t size, DmaCallback callback, volatile void* cb_param)
 {
 	//reset peripheral first, to ensure proper configuration
 	dma_reset(dma, channel);
@@ -185,7 +185,7 @@ uint16_t dma_get_remaining(enum DmaPeriph dma, enum DmaChannel channel)
 //--local functions-------------------------------------------------------------
 
 static void configure_dma(volatile struct DMA* dma, enum DmaChannel channel,
-		enum DmaConfig config_mask, void* periph, void* mem,
+		enum DmaConfig config_mask, volatile void* periph, void* mem,
 		uint16_t size)
 {
 	volatile struct DMA_CHANNEL* regs = &dma->CHANNELS[channel];
diff --git a/drivers/dma.h b/drivers/dma.h
index d2c7b54..14746f6 100644
--- a/drivers/dma.h
+++ b/drivers/dma.h
@@ -75,14 +75,14 @@ enum DmaIRQSource {
 	DMA_IQR_SOURCE_ERROR    = (0x2 << 3),
 };
 
-typedef void (*DmaCallback)(enum DmaIRQSource, void* param);
+typedef void (*DmaCallback)(enum DmaIRQSource, volatile void* param);
 
 
 //--functions-------------------------------------------------------------------
 
 void dma_configure(enum DmaPeriph dma, enum DmaChannel channel,
-		enum DmaConfig config_mask, void* periph, void* mem,
-		uint16_t size, DmaCallback callback, void* cb_param);
+		enum DmaConfig config_mask, volatile void* periph, void* mem,
+		uint16_t size, DmaCallback callback, volatile void* cb_param);
 
 void dma_configure_mem2mem(enum DmaPeriph dma, enum DmaChannel channel,
 		enum DmaConfigM2M config_mask, const void* src, void* dest,
diff --git a/drivers/dma_mbuf.c b/drivers/dma_mbuf.c
new file mode 100644
index 0000000..66c3520
--- /dev/null
+++ b/drivers/dma_mbuf.c
@@ -0,0 +1,125 @@
+/** @file dma_mbuf.c
+ * Module handling Direct Memory Access controller's TX functions
+ *
+ * The module provides convenient tools to send data to a peripheral or memory
+ * area in a buffered, non-blocking way
+ */
+
+//--includes--------------------------------------------------------------------
+
+#include "dma_mbuf.h"
+
+
+//--local definitions-----------------------------------------------------------
+
+static void mbuf_callback(enum DmaIRQSource src, volatile void* param);
+
+
+//--local variables-------------------------------------------------------------
+
+//--public functions------------------------------------------------------------
+
+void dma_mbuf_configure(volatile struct DmaMultiBuffer* buffer, void** buffers,
+		volatile void* dest, uint16_t buffer_size, uint8_t buffer_nb,
+		enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig config)
+{
+	#warning "check for null ptr"
+
+	buffer->buffers = buffers;
+	buffer->dest = dest;
+
+	buffer->buffer_size = buffer_size;
+	buffer->byte_index = 0;
+
+	buffer->buffer_nb = buffer_nb;
+	buffer->free_buffer_nb = buffer_nb - 1;
+	buffer->buffer_index = 0;
+	buffer->dma_buffer_index = 0;
+
+	buffer->dma = dma;
+	buffer->channel = channel;
+	buffer->config = config;
+}
+
+uint32_t dma_mbuf_write_byte(volatile struct DmaMultiBuffer* buffer,
+		uint8_t byte)
+{
+	dma_enter_critical(buffer->dma, buffer->channel);
+
+	//if the current buffer is full, we need to switch it with an empty one
+	if (buffer->byte_index >= buffer->buffer_size) {
+
+		//if all buffer full, simply wait for the DMA to empty one
+		dma_exit_critical(buffer->dma, buffer->channel);
+		while (buffer->free_buffer_nb == 0) {}
+		dma_enter_critical(buffer->dma, buffer->channel);
+
+		++buffer->buffer_index;
+		if (buffer->buffer_index >= buffer->buffer_nb) {
+			buffer->buffer_index = 0;
+		}
+		--buffer->free_buffer_nb;
+
+		buffer->byte_index = 0;
+	} else {
+		dma_enter_critical(buffer->dma, buffer->channel);
+	}
+
+	//write the byte
+	uint8_t** buffers = (uint8_t**)buffer->buffers;
+	buffers[buffer->buffer_index][buffer->byte_index] = byte;
+	++buffer->byte_index;
+
+	dma_exit_critical(DMA_PERIPH_1, buffer->channel);
+	return 0;
+}
+
+void dma_mbuf_refresh(volatile struct DmaMultiBuffer* buffer)
+{
+	//no more data to send, stop here
+	if (buffer->dma_buffer_index == buffer->buffer_index
+			&& buffer->byte_index == 0) {
+		return;
+	}
+
+	//else start a new transfer
+	dma_configure(buffer->dma, buffer->channel, buffer->config, buffer->dest,
+			buffer->buffers[buffer->dma_buffer_index],
+			buffer->byte_index, mbuf_callback, buffer);
+
+	//if the newly transfering buffer was being written to, switch the current
+	//buffer. Since we just ended a transfer, the next buffer should be empty
+	if (buffer->dma_buffer_index == buffer->buffer_index)
+	{
+		++buffer->buffer_index;
+		if (buffer->buffer_index >= buffer->buffer_nb) {
+			buffer->buffer_index = 0;
+		}
+		buffer->byte_index = 0;
+	}
+
+	return;
+}
+
+
+//--local functions-------------------------------------------------------------
+
+/**
+ * Callback called on DMA TX tranfert's completion. Checks for any remaining
+ * data to send. If any, starts a new transfer, else stop the DMA
+ */
+static void mbuf_callback(enum DmaIRQSource src, volatile void* param)
+{
+	(void)src; //only transfer complete expected
+	volatile struct DmaMultiBuffer* buffer = param;
+
+	//increment DMA's buffer since the last once has already been sent
+	++buffer->dma_buffer_index;
+	if (buffer->dma_buffer_index >= buffer->buffer_nb) {
+		buffer->dma_buffer_index = 0;
+	}
+	++buffer->free_buffer_nb;
+
+	dma_mbuf_refresh(param);
+}
+
diff --git a/drivers/dma_mbuf.h b/drivers/dma_mbuf.h
new file mode 100644
index 0000000..b14ba12
--- /dev/null
+++ b/drivers/dma_mbuf.h
@@ -0,0 +1,49 @@
+/** @file dma_mbuf.h
+ * Module handling Direct Memory Access controller's TX functions
+ *
+ * The module provides convenient tools to send data to a peripheral in a
+ * buffered, non-blocking way
+ */
+
+#ifndef _DMA_MBUF_H_
+#define _DMA_MBUF_H_
+
+//--includes--------------------------------------------------------------------
+
+#include "dma.h"
+
+
+//--type definitions------------------------------------------------------------
+
+struct DmaMultiBuffer {
+	void** buffers;           //list of buffers to write to
+	volatile void* dest;      //destination peripheral register
+
+	uint16_t buffer_size;     //size of a single buffer
+	uint16_t byte_index;      //index of the current byte in the current buffer
+
+	uint8_t buffer_nb;        //total number of buffers
+	uint8_t free_buffer_nb;   //number of buffers not currently used
+	uint8_t buffer_index;     //index of the current buffer
+	uint8_t dma_buffer_index; //index of the DMA's current buffer
+
+	enum DmaPeriph dma;       //DMA peripheral, must correspond to peripheral
+	enum DmaChannel channel;  //DMA channel, must correspond to peripheral
+	enum DmaConfig config;    //DMA config, must correspond to peripheral
+};
+
+
+//--functions-------------------------------------------------------------------
+
+void dma_mbuf_configure(volatile struct DmaMultiBuffer* buffer, void** buffers,
+		volatile void* dest, uint16_t buffer_size, uint8_t buffer_nb,
+        enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig config);
+
+uint32_t dma_mbuf_write_byte(volatile struct DmaMultiBuffer* buffer,
+		uint8_t byte);
+
+void dma_mbuf_refresh(volatile struct DmaMultiBuffer* buffer);
+
+
+#endif //_DMA_MBUF_H_
+
diff --git a/drivers/usart.c b/drivers/usart.c
index 87cd5f3..2224845 100644
--- a/drivers/usart.c
+++ b/drivers/usart.c
@@ -14,12 +14,18 @@
 
 #include "rcc.h"
 #include "dma.h"
+#include "dma_mbuf.h"
 
 #include "stddef.h"
 
 
 //--local definitions-----------------------------------------------------------
 
+#define DMA_CONFIG (DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_MEM \
+					| DMA_CONFIG_INC_MEM | DMA_CONFIG_PSIZE_8BITS \
+					| DMA_CONFIG_MSIZE_8BITS | DMA_CONFIG_PRIO_LOW)
+
+
 struct CircularBuffer {
 	volatile uint8_t* buffer; //the buffer to use as a circular buffer
 	uint16_t size;            //the size of the buffer
@@ -27,29 +33,16 @@ struct CircularBuffer {
 	bool dmaLooped;           //whether the DMA looped or not (buffer overflow)
 };
 
-struct FragmentedBuffer {
-	uint8_t** buffers;        //list of buffers to write to
-	uint16_t buffer_size;     //size of a single buffer
-	uint16_t byte_index;      //index of the current byte in the current buffer
-	uint8_t buffer_nb;        //total number of buffers
-	uint8_t free_buffer_nb;   //number of buffers not currently used
-	uint8_t buffer_index;     //index of the current buffer
-	uint8_t dma_buffer_index; //index of the DMA's current buffer
-};
-
 static void configure_usart(volatile struct USART* regs,
 		enum UsartConfig config);
 static void configure_baudrate(volatile struct USART* regs, uint32_t clock,
 		uint32_t baudrate);
-static uint32_t write_byte(volatile struct USART* regs, uint8_t byte);
 static uint32_t write_to_buffer(volatile struct USART* regs,
-		volatile struct FragmentedBuffer *buffer, enum DmaChannel channel,
-		uint8_t byte);
+		volatile struct DmaMultiBuffer *buffer, uint8_t byte);
 static uint32_t read_from_buffer(volatile struct CircularBuffer* buffer,
 		enum DmaChannel channel, uint8_t* byte);
 
-static void usart1_tx_callback(enum DmaIRQSource src);
-static void usart1_rx_callback(enum DmaIRQSource src);
+static void usart1_rx_callback(enum DmaIRQSource src, volatile void* param);
 
 
 //--local variables-------------------------------------------------------------
@@ -59,7 +52,7 @@ static volatile struct USART* const usart2 = (struct USART*)USART2_BASE_ADDRESS;
 static volatile struct USART* const usart3 = (struct USART*)USART3_BASE_ADDRESS;
 
 static volatile struct CircularBuffer usart1_rx_buffer;
-static volatile struct FragmentedBuffer usart1_tx_buffer;
+static volatile struct DmaMultiBuffer usart1_tx_buffer;
 
 
 //--public functions------------------------------------------------------------
@@ -95,14 +88,12 @@ void usart_configure(enum UsartPeriph periph, enum UsartConfig config,
 uint32_t usart_write_byte(enum UsartPeriph periph, uint8_t byte)
 {
 	volatile struct USART* regs;
-	volatile struct FragmentedBuffer* buffer;
-	enum DmaChannel dma_channel;
+	volatile struct DmaMultiBuffer* buffer;
 
 	switch (periph) {
 		case USART_PERIPH_1:
 			regs = usart1;
 			buffer = &usart1_tx_buffer;
-			dma_channel = DMA_CHANNEL_4;
 			break;
 		case USART_PERIPH_2:
 		case USART_PERIPH_3:
@@ -112,7 +103,7 @@ uint32_t usart_write_byte(enum UsartPeriph periph, uint8_t byte)
 	}
 
 	if (buffer->buffers) {
-		return write_to_buffer(regs, buffer, dma_channel, byte);
+		return write_to_buffer(regs, buffer, byte);
 	} else {
 		while (regs->SR.TXE == 0) {}
 		reg_write(regs->DR, USART_DR_DR, byte);
@@ -154,26 +145,17 @@ uint32_t usart_read_byte(enum UsartPeriph periph, uint8_t* byte)
 void usart_set_tx_buffer(enum UsartPeriph periph, uint8_t** buffers,
 		uint16_t buffer_size, uint8_t buffer_nb)
 {
-	volatile struct FragmentedBuffer* buffer = NULL;
 	switch (periph) {
 		case USART_PERIPH_1:
-			buffer = &usart1_tx_buffer;
+			dma_mbuf_configure(&usart1_tx_buffer, (void**)buffers, &usart1->DR,
+					buffer_size, buffer_nb, DMA_PERIPH_1, DMA_CHANNEL_4,
+					DMA_CONFIG);
 			break;
 		case USART_PERIPH_2:
 			break;
 		case USART_PERIPH_3:
 			break;
 	}
-
-#warning "check for null ptr"
-
-	buffer->buffers = buffers;
-	buffer->buffer_size = buffer_size;
-	buffer->byte_index = 0;
-	buffer->buffer_nb = buffer_nb;
-	buffer->free_buffer_nb = buffer_nb - 1;
-	buffer->buffer_index = 0;
-	buffer->dma_buffer_index = 0;
 }
 
 void usart_set_rx_buffer(enum UsartPeriph periph, uint8_t* buffer,
@@ -186,7 +168,7 @@ void usart_set_rx_buffer(enum UsartPeriph periph, uint8_t* buffer,
 					| DMA_CONFIG_CIRCULAR | DMA_CONFIG_INC_MEM
 					| DMA_CONFIG_PSIZE_8BITS | DMA_CONFIG_MSIZE_8BITS
 					| DMA_CONFIG_PRIO_LOW, (void*)&usart1->DR, buffer,
-					size, usart1_rx_callback);
+					size, usart1_rx_callback, NULL);
 			usart1_rx_buffer.buffer = buffer;
 			usart1_rx_buffer.size = size;
 			usart1_rx_buffer.begin = 0;
@@ -302,13 +284,13 @@ static void configure_baudrate(volatile struct USART* regs, uint32_t clock,
 }
 
 /**
- * Non-blocking write to the given USART. Will return 0 if the write was
- * successfull, 1 otherwise. If the write is successfull, the tranfer complete
- * IRQ is enabled and the DMA disabled
+ * Writes the given byte to the given UART, using a FragmentedBuffer and a DMA
+ * to bufferize the write if the peripheral is already busy.
  */
-static uint32_t write_byte(volatile struct USART* regs, uint8_t byte)
+static uint32_t write_to_buffer(volatile struct USART* regs,
+		volatile struct DmaMultiBuffer* buffer, uint8_t byte)
 {
-	//write if TX register empty
+	//if the tx register is empty, there is no need to go through the dma
 	if (regs->SR.TXE) {
 		reg_write(regs->DR, USART_DR_DR, byte);
 		//enable IRQ, disable DMA
@@ -316,51 +298,9 @@ static uint32_t write_byte(volatile struct USART* regs, uint8_t byte)
 		reg_set(regs->CR1, USART_CR1_TXEIE);
 		nvic_enable(NVIC_IRQ_USART1);
 		return 0;
-	} else {
-		return 1;
-	}
-}
-
-/**
- * Writes the given byte to the given UART, using a FragmentedBuffer and a DMA
- * to bufferize the write if the peripheral is already busy.
- */
-static uint32_t write_to_buffer(volatile struct USART *regs,
-		volatile struct FragmentedBuffer *buffer, enum DmaChannel channel,
-		uint8_t byte)
-{
-	//if the tx register is empty, there is no need to go through the dma
-	if (!write_byte(regs, byte)) {
-		return 0;
 	}
 
-	dma_enter_critical(DMA_PERIPH_1, channel);
-
-	//if the current buffer is full, we need to switch it with an empty one
-	if (buffer->byte_index >= buffer->buffer_size) {
-
-		//if all buffer full, simply wait for the DMA to empty one
-		dma_exit_critical(DMA_PERIPH_1, channel);
-		while (buffer->free_buffer_nb == 0) {}
-		dma_enter_critical(DMA_PERIPH_1, channel);
-
-		++buffer->buffer_index;
-		if (buffer->buffer_index >= buffer->buffer_nb) {
-			buffer->buffer_index = 0;
-		}
-		--buffer->free_buffer_nb;
-
-		buffer->byte_index = 0;
-	} else {
-		dma_enter_critical(DMA_PERIPH_1, channel);
-	}
-
-	//write the byte
-	buffer->buffers[buffer->buffer_index][buffer->byte_index] = byte;
-	++buffer->byte_index;
-
-	dma_exit_critical(DMA_PERIPH_1, channel);
-	return 0;
+	return dma_mbuf_write_byte(buffer, byte);
 }
 
 /**
@@ -393,57 +333,13 @@ static uint32_t read_from_buffer(volatile struct CircularBuffer* buffer,
 	return 0;
 }
 
-//--callbacks-------------------------------------------------------------------
-
-/**
- * Callback called on DMA TX tranfert's completion. Checks for any remaining
- * data to send. If any, starts a new transfer, else stop the DMA
- */
-static void usart1_tx_callback(enum DmaIRQSource src)
-{
-	(void)src; //only transfer complete expected
-	volatile struct FragmentedBuffer* buffer = &usart1_tx_buffer;
-
-	//increment DMA's buffer since the last once has already been sent
-	++buffer->dma_buffer_index;
-	if (buffer->dma_buffer_index >= buffer->buffer_nb) {
-		buffer->dma_buffer_index = 0;
-	}
-	++buffer->free_buffer_nb;
-
-	//no more data to send, stop here
-	if (buffer->dma_buffer_index == buffer->buffer_index
-			&& buffer->byte_index == 0) {
-		return;
-	}
-
-	//else start a new transfer
-	dma_configure(DMA_PERIPH_1, DMA_CHANNEL_4,
-			DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_MEM
-			| DMA_CONFIG_INC_MEM | DMA_CONFIG_PSIZE_8BITS
-			| DMA_CONFIG_MSIZE_8BITS | DMA_CONFIG_PRIO_LOW,
-			(void*)&usart1->DR,
-			(void*)buffer->buffers[buffer->dma_buffer_index],
-			buffer->byte_index,
-			usart1_tx_callback);
-
-	//if the newly transfering buffer was being written to, switch the current
-	//buffer. Since we just ended a transfer, the next buffer should be empty
-	if (buffer->dma_buffer_index == buffer->buffer_index)
-	{
-		++buffer->buffer_index;
-		if (buffer->buffer_index >= buffer->buffer_nb) {
-			buffer->buffer_index = 0;
-		}
-		buffer->byte_index = 0;
-	}
-}
+//--allbacks-------------------------------------------------------------------
 
 /**
  * Callback called on DMA RX tranfert's completion. Sets a flag needed to
  * properly handle the circular buffer
  */
-static void usart1_rx_callback(enum DmaIRQSource src)
+static void usart1_rx_callback(enum DmaIRQSource src, volatile void* param)
 {
 	(void)src; //only transfer complete expected
 	usart1_rx_buffer.dmaLooped = true;
@@ -454,35 +350,12 @@ static void usart1_rx_callback(enum DmaIRQSource src)
 
 void hdr_usart1(void)
 {
+	//disable the interrupt. It will be reenabled on a write if needed
 	nvic_clear_pending(NVIC_IRQ_USART1);
 	nvic_disable(NVIC_IRQ_USART1);
 	reg_reset(usart1->CR1, USART_CR1_TXEIE);
 	reg_set(usart1->CR3, USART_CR3_DMAT);
 
-	volatile struct FragmentedBuffer* buffer = &usart1_tx_buffer;
-
-	//no more data to send, stop here
-	if (buffer->dma_buffer_index == buffer->buffer_index
-			&& buffer->byte_index == 0) {
-		return;
-	}
-
-	dma_configure(DMA_PERIPH_1, DMA_CHANNEL_4,
-			DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_MEM
-			| DMA_CONFIG_INC_MEM | DMA_CONFIG_PSIZE_8BITS
-			| DMA_CONFIG_MSIZE_8BITS | DMA_CONFIG_PRIO_LOW,
-			(void*)&usart1->DR,
-			(void*)buffer->buffers[buffer->dma_buffer_index],
-			buffer->byte_index,
-			usart1_tx_callback);
-
-	if (buffer->dma_buffer_index == buffer->buffer_index)
-	{
-		++buffer->buffer_index;
-		if (buffer->buffer_index >= buffer->buffer_nb) {
-			buffer->buffer_index = 0;
-		}
-		buffer->byte_index = 0;
-	}
+	dma_mbuf_refresh(&usart1_tx_buffer);
 }