The reset handler is responsible for loading the variables default values. This includes variables initialized to 0, although they are handed through bss and not data
83 lines
1.5 KiB
Plaintext
83 lines
1.5 KiB
Plaintext
/** @file
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* Linker to be used with the HBL.
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*
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* This linker file provides the basic architecture for a projet. Stack size and
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* memory layout can be configured at will. Note that this file doesn't provide
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* a heap space since the HBL doesn't provide or use any form of dynamic
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* allocation.
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*/
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/*--Configuration-------------------------------------------------------------*/
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/* minimal stack size */
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_min_stack_size = 0x400;
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/* memory layout of the chip */
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MEMORY
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{
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ROM (rx) : ORIGIN = 0x08000000, LENGTH = 128K
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RAM (!rx) : ORIGIN = 0x20000000, LENGTH = 20K
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}
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/*--Description---------------------------------------------------------------*/
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ENTRY(hdr_reset)
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/* end of "RAM" Ram type memory */
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_estack = ORIGIN(RAM) + LENGTH(RAM);
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/* ROM adress to load data from */
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_sromdata = LOADADDR(.data);
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SECTIONS
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{
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/* vector table, cpu will look for it at adress 0 on reset */
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.vector_table :
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{
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KEEP(*(.vector_table))
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} > ROM
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/* program code */
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.text :
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{
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. = ALIGN(4);
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*(.text)
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} > ROM
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/* const data */
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata)
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} > ROM
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/* initialized data from ROM */
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.data :
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{
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. = ALIGN(4);
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_sdata = .;
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*(.data)
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. = ALIGN(4);
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_edata = .;
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} > RAM AT > ROM
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/* uninitialized data, zeroed */
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.bss :
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{
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. = ALIGN(4);
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_sbss = .;
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*(.bss)
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. = ALIGN(4);
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_ebss = .;
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} > RAM
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/* memory space allocated to stack. The stack is situated at the very end of
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* the RAM while this section may not, thus it is only used to enforce a
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* minimal stack size */
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.stack :
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{
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. = ALIGN(8);
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. = . + _min_stack_size;
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} > RAM
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}
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