Steins7
a4ca0d30c3
Using the system's reset avoids the debug getting stuck when the chip enters low power. Hopefully this works all the time
26 lines
698 B
INI
26 lines
698 B
INI
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# using a STM32f103CB wich has 128kB of flash instead of the more common 64KB
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set CHIPNAME stm32f103CB
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set FLASH_SIZE 0x20000
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# load default configurations
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source [find interface/stlink.cfg]
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source [find target/stm32f1x.cfg]
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# override examine-end event
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$CHIPNAME.cpu configure -event examine-end {
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# write DBGMCU_CR, disable all peripherals (timers, dmas, watchdogs while
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# halted by debug. Trace is not affected
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mmw 0xE0042004 0x7E3FFF07 0
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}
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reset_config srst_only srst_nogate connect_assert_srst
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# inits debugging, from that point, commands can be used
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init
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# resets the target and halt it immediately afterward. Stops debug from being
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# inacessible due to low-power states
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reset halt
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