stm32f1xx_HBL/drv/dma.h
Steins7 fd33003e26 Rework DMA buffer to work properly
DMA buffers now work reliably with USART. The DMA api has changed to make it
more efficient code-size-wise. This may, however, complicate things when
implementating powersaving features
2024-04-06 16:29:45 +02:00

114 lines
3.3 KiB
C

/** @file dma.h
* Module handling Direct Memory Access controller
*
* The module provides functions to configure the dma channels and controller
* transfers
*/
#ifndef _DMA_H_
#define _DMA_H_
//--includes--------------------------------------------------------------------
#include "stdint.h"
//--type definitions------------------------------------------------------------
enum DmaPeriph {
DMA_PERIPH_1,
DMA_PERIPH_2,
};
enum DmaChannel {
DMA_CHANNEL_1 = 0,
DMA_CHANNEL_2,
DMA_CHANNEL_3,
DMA_CHANNEL_4,
DMA_CHANNEL_5,
DMA_CHANNEL_6, //not available for DMA 2
DMA_CHANNEL_7, //not available for DMA 2
};
enum DmaConfig {
DMA_CONFIG_IRQ_COMPLETE = (0x1 << 1),
DMA_CONFIG_IRQ_HALF = (0x1 << 2),
DMA_CONFIG_IRQ_ERROR = (0x1 << 3),
DMA_CONFIG_FROM_MEM = (0x1 << 4),
DMA_CONFIG_FROM_PERIPH = (0x0 << 4),
DMA_CONFIG_CIRCULAR = (0x1 << 5),
DMA_CONFIG_INC_PERIPH = (0x1 << 6),
DMA_CONFIG_INC_MEM = (0x1 << 7),
DMA_CONFIG_PSIZE_8BITS = (0x0 << 8),
DMA_CONFIG_PSIZE_16BITS = (0x1 << 8),
DMA_CONFIG_PSIZE_32BITS = (0x2 << 8),
DMA_CONFIG_MSIZE_8BITS = (0x0 << 10),
DMA_CONFIG_MSIZE_16BITS = (0x1 << 10),
DMA_CONFIG_MSIZE_32BITS = (0x2 << 10),
DMA_CONFIG_PRIO_LOW = (0x0 << 12),
DMA_CONFIG_PRIO_MEDIUM = (0x1 << 12),
DMA_CONFIG_PRIO_HIGH = (0x2 << 12),
DMA_CONFIG_PRIO_VHIGH = (0x3 << 12),
};
enum DmaConfigM2M {
DMA_CONFIG_M2M_IRQ_COMPLETE = (0x1 << 1),
DMA_CONFIG_M2M_IRQ_HALF = (0x1 << 2),
DMA_CONFIG_M2M_IRQ_ERROR = (0x1 << 3),
DMA_CONFIG_M2M_INC_SRC = (0x1 << 6),
DMA_CONFIG_M2M_INC_DEST = (0x1 << 7),
DMA_CONFIG_M2M_SSIZE_8BITS = (0x0 << 8),
DMA_CONFIG_M2M_SSIZE_16BITS = (0x1 << 8),
DMA_CONFIG_M2M_SSIZE_32BITS = (0x2 << 8),
DMA_CONFIG_M2M_DSIZE_8BITS = (0x0 << 10),
DMA_CONFIG_M2M_DSIZE_16BITS = (0x1 << 10),
DMA_CONFIG_M2M_DSIZE_32BITS = (0x2 << 10),
DMA_CONFIG_M2M_PRIO_LOW = (0x0 << 12),
DMA_CONFIG_M2M_PRIO_MEDIUM = (0x1 << 12),
DMA_CONFIG_M2M_PRIO_HIGH = (0x2 << 12),
DMA_CONFIG_M2M_PRIO_VHIGH = (0x3 << 12),
};
enum DmaIRQSource {
DMA_IRQ_SOURCE_COMPLETE = (0x1 << 1),
DMA_IRQ_SOURCE_HALF = (0x1 << 2),
DMA_IQR_SOURCE_ERROR = (0x2 << 3),
};
typedef void (*DmaCallback)(enum DmaIRQSource, volatile void* param);
struct DmaParam {
void* periph;
enum DmaConfig config; //DMA config, must correspond to peripheral
enum DmaPeriph dma; //DMA peripheral, must correspond to peripheral
enum DmaChannel channel; //DMA channel, must correspond to peripheral
};
//--functions-------------------------------------------------------------------
void dma_configure(enum DmaPeriph dma, enum DmaChannel channel,
enum DmaConfig config_mask, volatile void* periph,
DmaCallback callback, volatile void* cb_param);
void dma_configure_mem2mem(enum DmaPeriph dma, enum DmaChannel channel,
enum DmaConfigM2M config_mask, const void* src, void* dest,
uint16_t size, DmaCallback callback, void* cb_param);
void dma_reset(enum DmaPeriph dma, enum DmaChannel channel);
void dma_exit_critical(enum DmaPeriph dma, enum DmaChannel channel);
void dma_start(enum DmaPeriph dma, enum DmaChannel channel,
volatile void* mem, uint16_t size);
void dma_enter_critical(enum DmaPeriph dma, enum DmaChannel channel);
void dma_stop(enum DmaPeriph dma, enum DmaChannel channel);
uint16_t dma_get_remaining(enum DmaPeriph dma, enum DmaChannel channe);
#endif //_DMA_H_