Steins7
ccf36ac400
The dma buffer should be services that are used on top of peripherals. As such, the usart driver should'nt directly use them, this is up to the user. The multi-buffer has also been simplified since I was not satisfied with the previous implementation
113 lines
3.3 KiB
C
113 lines
3.3 KiB
C
/** @file dma.h
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* Module handling Direct Memory Access controller
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*
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* The module provides functions to configure the dma channels and controller
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* transfers
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*/
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#ifndef _DMA_H_
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#define _DMA_H_
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//--includes--------------------------------------------------------------------
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#include "stdint.h"
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//--type definitions------------------------------------------------------------
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enum DmaPeriph {
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DMA_PERIPH_1,
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DMA_PERIPH_2,
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};
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enum DmaChannel {
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DMA_CHANNEL_1 = 0,
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DMA_CHANNEL_2,
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DMA_CHANNEL_3,
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DMA_CHANNEL_4,
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DMA_CHANNEL_5,
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DMA_CHANNEL_6, //not available for DMA 2
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DMA_CHANNEL_7, //not available for DMA 2
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};
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enum DmaConfig {
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DMA_CONFIG_IRQ_COMPLETE = (0x1 << 1),
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DMA_CONFIG_IRQ_HALF = (0x1 << 2),
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DMA_CONFIG_IRQ_ERROR = (0x1 << 3),
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DMA_CONFIG_FROM_MEM = (0x1 << 4),
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DMA_CONFIG_FROM_PERIPH = (0x0 << 4),
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DMA_CONFIG_CIRCULAR = (0x1 << 5),
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DMA_CONFIG_INC_PERIPH = (0x1 << 6),
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DMA_CONFIG_INC_MEM = (0x1 << 7),
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DMA_CONFIG_PSIZE_8BITS = (0x0 << 8),
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DMA_CONFIG_PSIZE_16BITS = (0x1 << 8),
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DMA_CONFIG_PSIZE_32BITS = (0x2 << 8),
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DMA_CONFIG_MSIZE_8BITS = (0x0 << 10),
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DMA_CONFIG_MSIZE_16BITS = (0x1 << 10),
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DMA_CONFIG_MSIZE_32BITS = (0x2 << 10),
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DMA_CONFIG_PRIO_LOW = (0x0 << 12),
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DMA_CONFIG_PRIO_MEDIUM = (0x1 << 12),
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DMA_CONFIG_PRIO_HIGH = (0x2 << 12),
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DMA_CONFIG_PRIO_VHIGH = (0x3 << 12),
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};
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enum DmaConfigM2M {
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DMA_CONFIG_M2M_IRQ_COMPLETE = (0x1 << 1),
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DMA_CONFIG_M2M_IRQ_HALF = (0x1 << 2),
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DMA_CONFIG_M2M_IRQ_ERROR = (0x1 << 3),
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DMA_CONFIG_M2M_INC_SRC = (0x1 << 6),
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DMA_CONFIG_M2M_INC_DEST = (0x1 << 7),
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DMA_CONFIG_M2M_SSIZE_8BITS = (0x0 << 8),
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DMA_CONFIG_M2M_SSIZE_16BITS = (0x1 << 8),
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DMA_CONFIG_M2M_SSIZE_32BITS = (0x2 << 8),
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DMA_CONFIG_M2M_DSIZE_8BITS = (0x0 << 10),
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DMA_CONFIG_M2M_DSIZE_16BITS = (0x1 << 10),
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DMA_CONFIG_M2M_DSIZE_32BITS = (0x2 << 10),
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DMA_CONFIG_M2M_PRIO_LOW = (0x0 << 12),
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DMA_CONFIG_M2M_PRIO_MEDIUM = (0x1 << 12),
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DMA_CONFIG_M2M_PRIO_HIGH = (0x2 << 12),
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DMA_CONFIG_M2M_PRIO_VHIGH = (0x3 << 12),
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};
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enum DmaIRQSource {
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DMA_IRQ_SOURCE_COMPLETE = (0x1 << 1),
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DMA_IRQ_SOURCE_HALF = (0x1 << 2),
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DMA_IQR_SOURCE_ERROR = (0x2 << 3),
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};
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typedef void (*DmaCallback)(enum DmaIRQSource, volatile void* param);
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struct DmaParam {
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void* periph;
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enum DmaConfig config; //DMA config, must correspond to peripheral
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enum DmaPeriph dma; //DMA peripheral, must correspond to peripheral
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enum DmaChannel channel; //DMA channel, must correspond to peripheral
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};
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//--functions-------------------------------------------------------------------
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void dma_configure(enum DmaPeriph dma, enum DmaChannel channel,
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enum DmaConfig config_mask, volatile void* periph, volatile void* mem,
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uint16_t size, DmaCallback callback, volatile void* cb_param);
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void dma_configure_mem2mem(enum DmaPeriph dma, enum DmaChannel channel,
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enum DmaConfigM2M config_mask, const void* src, void* dest,
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uint16_t size, DmaCallback callback, void* cb_param);
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void dma_reset(enum DmaPeriph dma, enum DmaChannel channel);
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void dma_exit_critical(enum DmaPeriph dma, enum DmaChannel channel);
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void dma_enable(enum DmaPeriph dma, enum DmaChannel channel);
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void dma_enter_critical(enum DmaPeriph dma, enum DmaChannel channel);
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void dma_disable(enum DmaPeriph dma, enum DmaChannel channel);
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uint16_t dma_get_remaining(enum DmaPeriph dma, enum DmaChannel channe);
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#endif //_DMA_H_
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