Steins7
5e4d87474a
A while back, macros had to be put in place to avoid letting the compiler directly use the bitfields. This was necessary because the compiler used strb instruction which only write bytes. On the AHB bus, byte writes are transformed into word writes by repeating the byte, which caused mayhem in the registers. After a lot of research, turns out the packed attribute stops the compiler from does optimal (word) writes and isn't needed anyway. Removing them fixes the issue
126 lines
2.2 KiB
C
126 lines
2.2 KiB
C
/** @file afio_regs.h
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* Module defining the AFIO registers.
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*
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* Mainly made to be used by the afio module. It is recommanded to go through
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* the functions provided by that module instead of directly using the registers
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* defined here.
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*/
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#ifndef _AFIO_REGS_H_
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#define _AFIO_REGS_H_
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//--includes--------------------------------------------------------------------
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#include "stdint.h"
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//--type definitions------------------------------------------------------------
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#define AFIO_BASE_ADDRESS 0x40010000
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union EVCR {
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struct {
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uint32_t PIN:4;
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uint32_t PORT:3;
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uint32_t EVOE:1;
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uint32_t reserved1:24;
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};
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uint32_t word;
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};
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union MAPR {
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struct {
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uint32_t SPI1_REMAP:1;
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uint32_t I2C1_REMAP:1;
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uint32_t USART1_REMAP:1;
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uint32_t USART2_REMAP:1;
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uint32_t USART3_REMAP:2;
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uint32_t TIM1_REMAP:2;
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uint32_t TIM2_REMAP:2;
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uint32_t TIM3_REMAP:2;
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uint32_t TIM4_REMAP:1;
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uint32_t CAN_REMAP:2;
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uint32_t PD01_REMAP:1;
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uint32_t TIM5CH4_REMAP:1;
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uint32_t ADC1_ETRGINJ_REMAP:1;
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uint32_t ADC1_ETRGREG_REMAP:1;
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uint32_t ADC2_ETRGINJ_REMAP:1;
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uint32_t ADC2_ETRGREG_REMAP:1;
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uint32_t reserved1:3;
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uint32_t SWJ_CFG:3;
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uint32_t reserved2:5;
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};
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uint32_t word;
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};
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union EXTICR1 {
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struct {
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uint32_t EXTI0:4;
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uint32_t EXTI1:4;
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uint32_t EXTI2:4;
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uint32_t EXTI3:4;
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uint32_t reserved1:16;
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};
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uint32_t word;
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};
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union EXTICR2 {
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struct {
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uint32_t EXTI4:4;
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uint32_t EXTI5:4;
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uint32_t EXTI6:4;
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uint32_t EXTI7:4;
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uint32_t reserved1:16;
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};
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uint32_t word;
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};
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union EXTICR3 {
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struct {
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uint32_t EXTI8:4;
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uint32_t EXTI9:4;
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uint32_t EXTI10:4;
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uint32_t EXTI11:4;
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uint32_t reserved1:16;
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};
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uint32_t word;
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};
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union EXTICR4 {
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struct {
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uint32_t EXTI12:4;
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uint32_t EXTI13:4;
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uint32_t EXTI14:4;
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uint32_t EXTI15:4;
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uint32_t reserved1:16;
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};
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uint32_t word;
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};
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union MAPR2 {
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struct {
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uint32_t reserved1:5;
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uint32_t TIM9_REMAP:1;
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uint32_t TIM10_REMAP:1;
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uint32_t TIM11_REMAP:1;
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uint32_t TIM13_REMAP:1;
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uint32_t TIM14_REMAP:1;
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uint32_t FSMC_NADV:1;
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uint32_t reserved2:21;
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};
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uint32_t word;
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};
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struct AFIO {
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union EVCR EVCR;
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union MAPR MAPR;
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union EXTICR1 EXTICR1;
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union EXTICR2 EXTICR2;
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union EXTICR3 EXTICR3;
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union EXTICR4 EXTICR4;
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union MAPR2 MAPR2;
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};
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#endif //_AFIO_REGS_H_
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