Move DMA's tx buffer to a separate module
This commit is contained in:
parent
9f2b337abf
commit
dac751e466
@ -19,7 +19,7 @@
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//--local definitions-----------------------------------------------------------
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static void configure_dma(volatile struct DMA* dma, enum DmaChannel channel,
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enum DmaConfig config_mask, void* periph, void* mem,
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enum DmaConfig config_mask, volatile void* periph, void* mem,
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uint16_t size);
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@ -28,16 +28,16 @@ static void configure_dma(volatile struct DMA* dma, enum DmaChannel channel,
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static volatile struct DMA* const dma1 = (struct DMA*)DMA1_BASE_ADDRESS;
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static volatile struct DMA* const dma2 = (struct DMA*)DMA2_BASE_ADDRESS;
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static DmaCallback dma1_callbacks[7];
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static void* dma1_cb_params[7];
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static volatile void* dma1_cb_params[7];
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static DmaCallback dma2_callbacks[5];
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static void* dma2_cb_params[5];
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static volatile void* dma2_cb_params[5];
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//--public functions------------------------------------------------------------
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void dma_configure(enum DmaPeriph dma, enum DmaChannel channel,
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enum DmaConfig config_mask, void* periph, void* mem,
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uint16_t size, DmaCallback callback, void* cb_param)
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enum DmaConfig config_mask, volatile void* periph, void* mem,
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uint16_t size, DmaCallback callback, volatile void* cb_param)
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{
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//reset peripheral first, to ensure proper configuration
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dma_reset(dma, channel);
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@ -185,7 +185,7 @@ uint16_t dma_get_remaining(enum DmaPeriph dma, enum DmaChannel channel)
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//--local functions-------------------------------------------------------------
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static void configure_dma(volatile struct DMA* dma, enum DmaChannel channel,
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enum DmaConfig config_mask, void* periph, void* mem,
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enum DmaConfig config_mask, volatile void* periph, void* mem,
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uint16_t size)
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{
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volatile struct DMA_CHANNEL* regs = &dma->CHANNELS[channel];
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@ -75,14 +75,14 @@ enum DmaIRQSource {
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DMA_IQR_SOURCE_ERROR = (0x2 << 3),
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};
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typedef void (*DmaCallback)(enum DmaIRQSource, void* param);
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typedef void (*DmaCallback)(enum DmaIRQSource, volatile void* param);
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//--functions-------------------------------------------------------------------
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void dma_configure(enum DmaPeriph dma, enum DmaChannel channel,
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enum DmaConfig config_mask, void* periph, void* mem,
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uint16_t size, DmaCallback callback, void* cb_param);
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enum DmaConfig config_mask, volatile void* periph, void* mem,
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uint16_t size, DmaCallback callback, volatile void* cb_param);
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void dma_configure_mem2mem(enum DmaPeriph dma, enum DmaChannel channel,
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enum DmaConfigM2M config_mask, const void* src, void* dest,
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125
drivers/dma_mbuf.c
Normal file
125
drivers/dma_mbuf.c
Normal file
@ -0,0 +1,125 @@
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/** @file dma_mbuf.c
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* Module handling Direct Memory Access controller's TX functions
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*
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* The module provides convenient tools to send data to a peripheral or memory
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* area in a buffered, non-blocking way
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*/
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//--includes--------------------------------------------------------------------
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#include "dma_mbuf.h"
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//--local definitions-----------------------------------------------------------
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static void mbuf_callback(enum DmaIRQSource src, volatile void* param);
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//--local variables-------------------------------------------------------------
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//--public functions------------------------------------------------------------
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void dma_mbuf_configure(volatile struct DmaMultiBuffer* buffer, void** buffers,
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volatile void* dest, uint16_t buffer_size, uint8_t buffer_nb,
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enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig config)
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{
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#warning "check for null ptr"
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buffer->buffers = buffers;
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buffer->dest = dest;
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buffer->buffer_size = buffer_size;
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buffer->byte_index = 0;
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buffer->buffer_nb = buffer_nb;
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buffer->free_buffer_nb = buffer_nb - 1;
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buffer->buffer_index = 0;
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buffer->dma_buffer_index = 0;
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buffer->dma = dma;
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buffer->channel = channel;
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buffer->config = config;
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}
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uint32_t dma_mbuf_write_byte(volatile struct DmaMultiBuffer* buffer,
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uint8_t byte)
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{
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dma_enter_critical(buffer->dma, buffer->channel);
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//if the current buffer is full, we need to switch it with an empty one
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if (buffer->byte_index >= buffer->buffer_size) {
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//if all buffer full, simply wait for the DMA to empty one
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dma_exit_critical(buffer->dma, buffer->channel);
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while (buffer->free_buffer_nb == 0) {}
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dma_enter_critical(buffer->dma, buffer->channel);
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++buffer->buffer_index;
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if (buffer->buffer_index >= buffer->buffer_nb) {
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buffer->buffer_index = 0;
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}
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--buffer->free_buffer_nb;
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buffer->byte_index = 0;
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} else {
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dma_enter_critical(buffer->dma, buffer->channel);
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}
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//write the byte
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uint8_t** buffers = (uint8_t**)buffer->buffers;
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buffers[buffer->buffer_index][buffer->byte_index] = byte;
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++buffer->byte_index;
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dma_exit_critical(DMA_PERIPH_1, buffer->channel);
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return 0;
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}
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void dma_mbuf_refresh(volatile struct DmaMultiBuffer* buffer)
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{
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//no more data to send, stop here
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if (buffer->dma_buffer_index == buffer->buffer_index
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&& buffer->byte_index == 0) {
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return;
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}
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//else start a new transfer
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dma_configure(buffer->dma, buffer->channel, buffer->config, buffer->dest,
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buffer->buffers[buffer->dma_buffer_index],
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buffer->byte_index, mbuf_callback, buffer);
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//if the newly transfering buffer was being written to, switch the current
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//buffer. Since we just ended a transfer, the next buffer should be empty
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if (buffer->dma_buffer_index == buffer->buffer_index)
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{
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++buffer->buffer_index;
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if (buffer->buffer_index >= buffer->buffer_nb) {
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buffer->buffer_index = 0;
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}
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buffer->byte_index = 0;
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}
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return;
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}
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//--local functions-------------------------------------------------------------
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/**
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* Callback called on DMA TX tranfert's completion. Checks for any remaining
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* data to send. If any, starts a new transfer, else stop the DMA
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*/
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static void mbuf_callback(enum DmaIRQSource src, volatile void* param)
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{
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(void)src; //only transfer complete expected
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volatile struct DmaMultiBuffer* buffer = param;
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//increment DMA's buffer since the last once has already been sent
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++buffer->dma_buffer_index;
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if (buffer->dma_buffer_index >= buffer->buffer_nb) {
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buffer->dma_buffer_index = 0;
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}
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++buffer->free_buffer_nb;
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dma_mbuf_refresh(param);
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}
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49
drivers/dma_mbuf.h
Normal file
49
drivers/dma_mbuf.h
Normal file
@ -0,0 +1,49 @@
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/** @file dma_mbuf.h
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* Module handling Direct Memory Access controller's TX functions
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*
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* The module provides convenient tools to send data to a peripheral in a
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* buffered, non-blocking way
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*/
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#ifndef _DMA_MBUF_H_
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#define _DMA_MBUF_H_
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//--includes--------------------------------------------------------------------
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#include "dma.h"
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//--type definitions------------------------------------------------------------
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struct DmaMultiBuffer {
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void** buffers; //list of buffers to write to
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volatile void* dest; //destination peripheral register
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uint16_t buffer_size; //size of a single buffer
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uint16_t byte_index; //index of the current byte in the current buffer
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uint8_t buffer_nb; //total number of buffers
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uint8_t free_buffer_nb; //number of buffers not currently used
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uint8_t buffer_index; //index of the current buffer
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uint8_t dma_buffer_index; //index of the DMA's current buffer
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enum DmaPeriph dma; //DMA peripheral, must correspond to peripheral
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enum DmaChannel channel; //DMA channel, must correspond to peripheral
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enum DmaConfig config; //DMA config, must correspond to peripheral
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};
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//--functions-------------------------------------------------------------------
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void dma_mbuf_configure(volatile struct DmaMultiBuffer* buffer, void** buffers,
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volatile void* dest, uint16_t buffer_size, uint8_t buffer_nb,
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enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig config);
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uint32_t dma_mbuf_write_byte(volatile struct DmaMultiBuffer* buffer,
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uint8_t byte);
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void dma_mbuf_refresh(volatile struct DmaMultiBuffer* buffer);
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#endif //_DMA_MBUF_H_
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177
drivers/usart.c
177
drivers/usart.c
@ -14,12 +14,18 @@
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#include "rcc.h"
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#include "dma.h"
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#include "dma_mbuf.h"
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#include "stddef.h"
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//--local definitions-----------------------------------------------------------
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#define DMA_CONFIG (DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_MEM \
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| DMA_CONFIG_INC_MEM | DMA_CONFIG_PSIZE_8BITS \
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| DMA_CONFIG_MSIZE_8BITS | DMA_CONFIG_PRIO_LOW)
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struct CircularBuffer {
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volatile uint8_t* buffer; //the buffer to use as a circular buffer
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uint16_t size; //the size of the buffer
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@ -27,29 +33,16 @@ struct CircularBuffer {
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bool dmaLooped; //whether the DMA looped or not (buffer overflow)
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};
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struct FragmentedBuffer {
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uint8_t** buffers; //list of buffers to write to
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uint16_t buffer_size; //size of a single buffer
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uint16_t byte_index; //index of the current byte in the current buffer
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uint8_t buffer_nb; //total number of buffers
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uint8_t free_buffer_nb; //number of buffers not currently used
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uint8_t buffer_index; //index of the current buffer
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uint8_t dma_buffer_index; //index of the DMA's current buffer
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};
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static void configure_usart(volatile struct USART* regs,
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enum UsartConfig config);
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static void configure_baudrate(volatile struct USART* regs, uint32_t clock,
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uint32_t baudrate);
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static uint32_t write_byte(volatile struct USART* regs, uint8_t byte);
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static uint32_t write_to_buffer(volatile struct USART* regs,
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volatile struct FragmentedBuffer *buffer, enum DmaChannel channel,
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uint8_t byte);
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volatile struct DmaMultiBuffer *buffer, uint8_t byte);
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static uint32_t read_from_buffer(volatile struct CircularBuffer* buffer,
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enum DmaChannel channel, uint8_t* byte);
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static void usart1_tx_callback(enum DmaIRQSource src);
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static void usart1_rx_callback(enum DmaIRQSource src);
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static void usart1_rx_callback(enum DmaIRQSource src, volatile void* param);
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//--local variables-------------------------------------------------------------
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@ -59,7 +52,7 @@ static volatile struct USART* const usart2 = (struct USART*)USART2_BASE_ADDRESS;
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static volatile struct USART* const usart3 = (struct USART*)USART3_BASE_ADDRESS;
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static volatile struct CircularBuffer usart1_rx_buffer;
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static volatile struct FragmentedBuffer usart1_tx_buffer;
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static volatile struct DmaMultiBuffer usart1_tx_buffer;
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//--public functions------------------------------------------------------------
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@ -95,14 +88,12 @@ void usart_configure(enum UsartPeriph periph, enum UsartConfig config,
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uint32_t usart_write_byte(enum UsartPeriph periph, uint8_t byte)
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{
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volatile struct USART* regs;
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volatile struct FragmentedBuffer* buffer;
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enum DmaChannel dma_channel;
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volatile struct DmaMultiBuffer* buffer;
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switch (periph) {
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case USART_PERIPH_1:
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regs = usart1;
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buffer = &usart1_tx_buffer;
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dma_channel = DMA_CHANNEL_4;
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break;
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case USART_PERIPH_2:
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case USART_PERIPH_3:
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@ -112,7 +103,7 @@ uint32_t usart_write_byte(enum UsartPeriph periph, uint8_t byte)
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}
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if (buffer->buffers) {
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return write_to_buffer(regs, buffer, dma_channel, byte);
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return write_to_buffer(regs, buffer, byte);
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} else {
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while (regs->SR.TXE == 0) {}
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reg_write(regs->DR, USART_DR_DR, byte);
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@ -154,26 +145,17 @@ uint32_t usart_read_byte(enum UsartPeriph periph, uint8_t* byte)
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void usart_set_tx_buffer(enum UsartPeriph periph, uint8_t** buffers,
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uint16_t buffer_size, uint8_t buffer_nb)
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{
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volatile struct FragmentedBuffer* buffer = NULL;
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switch (periph) {
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case USART_PERIPH_1:
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buffer = &usart1_tx_buffer;
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dma_mbuf_configure(&usart1_tx_buffer, (void**)buffers, &usart1->DR,
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buffer_size, buffer_nb, DMA_PERIPH_1, DMA_CHANNEL_4,
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DMA_CONFIG);
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break;
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case USART_PERIPH_2:
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break;
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case USART_PERIPH_3:
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break;
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}
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#warning "check for null ptr"
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buffer->buffers = buffers;
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buffer->buffer_size = buffer_size;
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buffer->byte_index = 0;
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buffer->buffer_nb = buffer_nb;
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buffer->free_buffer_nb = buffer_nb - 1;
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buffer->buffer_index = 0;
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buffer->dma_buffer_index = 0;
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}
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void usart_set_rx_buffer(enum UsartPeriph periph, uint8_t* buffer,
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@ -186,7 +168,7 @@ void usart_set_rx_buffer(enum UsartPeriph periph, uint8_t* buffer,
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| DMA_CONFIG_CIRCULAR | DMA_CONFIG_INC_MEM
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| DMA_CONFIG_PSIZE_8BITS | DMA_CONFIG_MSIZE_8BITS
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| DMA_CONFIG_PRIO_LOW, (void*)&usart1->DR, buffer,
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size, usart1_rx_callback);
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size, usart1_rx_callback, NULL);
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usart1_rx_buffer.buffer = buffer;
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usart1_rx_buffer.size = size;
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usart1_rx_buffer.begin = 0;
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@ -302,13 +284,13 @@ static void configure_baudrate(volatile struct USART* regs, uint32_t clock,
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}
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/**
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* Non-blocking write to the given USART. Will return 0 if the write was
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* successfull, 1 otherwise. If the write is successfull, the tranfer complete
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* IRQ is enabled and the DMA disabled
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* Writes the given byte to the given UART, using a FragmentedBuffer and a DMA
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* to bufferize the write if the peripheral is already busy.
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*/
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static uint32_t write_byte(volatile struct USART* regs, uint8_t byte)
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static uint32_t write_to_buffer(volatile struct USART* regs,
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volatile struct DmaMultiBuffer* buffer, uint8_t byte)
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{
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//write if TX register empty
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//if the tx register is empty, there is no need to go through the dma
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if (regs->SR.TXE) {
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reg_write(regs->DR, USART_DR_DR, byte);
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//enable IRQ, disable DMA
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@ -316,51 +298,9 @@ static uint32_t write_byte(volatile struct USART* regs, uint8_t byte)
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reg_set(regs->CR1, USART_CR1_TXEIE);
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nvic_enable(NVIC_IRQ_USART1);
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return 0;
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} else {
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return 1;
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}
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}
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/**
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* Writes the given byte to the given UART, using a FragmentedBuffer and a DMA
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* to bufferize the write if the peripheral is already busy.
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*/
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static uint32_t write_to_buffer(volatile struct USART *regs,
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volatile struct FragmentedBuffer *buffer, enum DmaChannel channel,
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uint8_t byte)
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{
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//if the tx register is empty, there is no need to go through the dma
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if (!write_byte(regs, byte)) {
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return 0;
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}
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dma_enter_critical(DMA_PERIPH_1, channel);
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//if the current buffer is full, we need to switch it with an empty one
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if (buffer->byte_index >= buffer->buffer_size) {
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//if all buffer full, simply wait for the DMA to empty one
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dma_exit_critical(DMA_PERIPH_1, channel);
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while (buffer->free_buffer_nb == 0) {}
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dma_enter_critical(DMA_PERIPH_1, channel);
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++buffer->buffer_index;
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if (buffer->buffer_index >= buffer->buffer_nb) {
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buffer->buffer_index = 0;
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}
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--buffer->free_buffer_nb;
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buffer->byte_index = 0;
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} else {
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dma_enter_critical(DMA_PERIPH_1, channel);
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}
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//write the byte
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buffer->buffers[buffer->buffer_index][buffer->byte_index] = byte;
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++buffer->byte_index;
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dma_exit_critical(DMA_PERIPH_1, channel);
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return 0;
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return dma_mbuf_write_byte(buffer, byte);
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}
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/**
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@ -393,57 +333,13 @@ static uint32_t read_from_buffer(volatile struct CircularBuffer* buffer,
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return 0;
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}
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//--callbacks-------------------------------------------------------------------
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/**
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* Callback called on DMA TX tranfert's completion. Checks for any remaining
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* data to send. If any, starts a new transfer, else stop the DMA
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*/
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static void usart1_tx_callback(enum DmaIRQSource src)
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{
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(void)src; //only transfer complete expected
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volatile struct FragmentedBuffer* buffer = &usart1_tx_buffer;
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//increment DMA's buffer since the last once has already been sent
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++buffer->dma_buffer_index;
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if (buffer->dma_buffer_index >= buffer->buffer_nb) {
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buffer->dma_buffer_index = 0;
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}
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++buffer->free_buffer_nb;
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//no more data to send, stop here
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if (buffer->dma_buffer_index == buffer->buffer_index
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||||
&& buffer->byte_index == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
//else start a new transfer
|
||||
dma_configure(DMA_PERIPH_1, DMA_CHANNEL_4,
|
||||
DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_MEM
|
||||
| DMA_CONFIG_INC_MEM | DMA_CONFIG_PSIZE_8BITS
|
||||
| DMA_CONFIG_MSIZE_8BITS | DMA_CONFIG_PRIO_LOW,
|
||||
(void*)&usart1->DR,
|
||||
(void*)buffer->buffers[buffer->dma_buffer_index],
|
||||
buffer->byte_index,
|
||||
usart1_tx_callback);
|
||||
|
||||
//if the newly transfering buffer was being written to, switch the current
|
||||
//buffer. Since we just ended a transfer, the next buffer should be empty
|
||||
if (buffer->dma_buffer_index == buffer->buffer_index)
|
||||
{
|
||||
++buffer->buffer_index;
|
||||
if (buffer->buffer_index >= buffer->buffer_nb) {
|
||||
buffer->buffer_index = 0;
|
||||
}
|
||||
buffer->byte_index = 0;
|
||||
}
|
||||
}
|
||||
//--allbacks-------------------------------------------------------------------
|
||||
|
||||
/**
|
||||
* Callback called on DMA RX tranfert's completion. Sets a flag needed to
|
||||
* properly handle the circular buffer
|
||||
*/
|
||||
static void usart1_rx_callback(enum DmaIRQSource src)
|
||||
static void usart1_rx_callback(enum DmaIRQSource src, volatile void* param)
|
||||
{
|
||||
(void)src; //only transfer complete expected
|
||||
usart1_rx_buffer.dmaLooped = true;
|
||||
@ -454,35 +350,12 @@ static void usart1_rx_callback(enum DmaIRQSource src)
|
||||
|
||||
void hdr_usart1(void)
|
||||
{
|
||||
//disable the interrupt. It will be reenabled on a write if needed
|
||||
nvic_clear_pending(NVIC_IRQ_USART1);
|
||||
nvic_disable(NVIC_IRQ_USART1);
|
||||
reg_reset(usart1->CR1, USART_CR1_TXEIE);
|
||||
reg_set(usart1->CR3, USART_CR3_DMAT);
|
||||
|
||||
volatile struct FragmentedBuffer* buffer = &usart1_tx_buffer;
|
||||
|
||||
//no more data to send, stop here
|
||||
if (buffer->dma_buffer_index == buffer->buffer_index
|
||||
&& buffer->byte_index == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
dma_configure(DMA_PERIPH_1, DMA_CHANNEL_4,
|
||||
DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_MEM
|
||||
| DMA_CONFIG_INC_MEM | DMA_CONFIG_PSIZE_8BITS
|
||||
| DMA_CONFIG_MSIZE_8BITS | DMA_CONFIG_PRIO_LOW,
|
||||
(void*)&usart1->DR,
|
||||
(void*)buffer->buffers[buffer->dma_buffer_index],
|
||||
buffer->byte_index,
|
||||
usart1_tx_callback);
|
||||
|
||||
if (buffer->dma_buffer_index == buffer->buffer_index)
|
||||
{
|
||||
++buffer->buffer_index;
|
||||
if (buffer->buffer_index >= buffer->buffer_nb) {
|
||||
buffer->buffer_index = 0;
|
||||
}
|
||||
buffer->byte_index = 0;
|
||||
}
|
||||
dma_mbuf_refresh(&usart1_tx_buffer);
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user