Steins7/stm32f1xx_HBL
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task #5

Merged
Steins7 merged 35 commits from task into dev 2024-08-04 18:30:16 +00:00
Conversation 0 Commits 35 Files Changed 34 +16 -1
2 changed files with 16 additions and 1 deletions
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Showing only changes of commit b37eb1dd6e - Show all commits

8
drv/rcc.c
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@ -66,10 +66,16 @@ void rcc_configure_lsi(bool enable)
//ensure LSI is enabled //ensure LSI is enabled
if (enable) { if (enable) {
while (regs->CSR.LSIRDY != 0x1); while (regs->CSR.LSIRDY != 0x1) {}
} }
} }
void rcc_configure_rtc(bool enable, enum RccRtcClockSrc clock_src)
{
regs->BDCR.RTCSEL = clock_src;
regs->BDCR.RTCEN = enable;
}
void rcc_enable(enum RccAhb ahb_mask, enum RccApb1 apb1_mask, void rcc_enable(enum RccAhb ahb_mask, enum RccApb1 apb1_mask,
enum RccApb2 apb2_mask) enum RccApb2 apb2_mask)
{ {

9
drv/rcc.h
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@ -95,6 +95,13 @@ enum RccApb2 {
RCC_APB2_TIM11 = (0x1 << 21), RCC_APB2_TIM11 = (0x1 << 21),
}; };
enum RccRtcClockSrc {
RCC_RTC_CLOCK_SRC_NONE = 0x0,
RCC_RTC_CLOCK_SRC_LSE = 0x1,
RCC_RTC_CLOCK_SRC_LSI = 0x2,
RCC_RTC_CLOCK_SRC_HSE = 0x3,
};
struct RccClocks { struct RccClocks {
uint32_t ahb_freq; uint32_t ahb_freq;
uint32_t apb1_freq; uint32_t apb1_freq;
@ -118,6 +125,8 @@ void rcc_configure(enum RccPreset preset);
*/ */
void rcc_configure_lsi(bool enable); void rcc_configure_lsi(bool enable);
void rcc_configure_rtc(bool enable, enum RccRtcClockSrc clock_src);
/** /**
* Enables peripherals on the different buses. The enums values can used as * Enables peripherals on the different buses. The enums values can used as
* masks to enable multiple peripherals at the same time. Invalid values will be * masks to enable multiple peripherals at the same time. Invalid values will be