Steins7
4a12fa7a3d
Project was organized as an application, wich makes it less practical to include in other projects. A template project may be added back to make up for the missing files
339 lines
7.1 KiB
C
339 lines
7.1 KiB
C
#include "timer.h"
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extern Clock_t sysclks;
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//------------------------------------------------------------------------------
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static OnTick callback1 = 0;
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static OnTick callback2 = 0;
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static OnTick callback3 = 0;
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static OnTick callback4 = 0;
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void TIM1_UP_IRQHandler(void) {
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if (callback1) callback1();
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TIM1->SR &= ~0x1F;
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}
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void TIM2_IRQHandler(void) {
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if (callback2) callback2();
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TIM2->SR &= ~0x1F;
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}
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void TIM3_IRQHandler(void) {
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if (callback3) callback3();
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TIM3->SR &= ~0x1F;
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}
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void TIM4_IRQHandler(void) {
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if (callback4) callback4();
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TIM4->SR &= ~0x1F;
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}
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//------------------------------------------------------------------------------
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int timer_config_cb(TIM_TypeDef* tmr, uint32_t* clk, OnTick cb) {
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IRQn_Type irqn;
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uint32_t irq_priority;
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switch((uint32_t)tmr) {
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case (uint32_t)TIM1:
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// get clocks config
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*clk = sysclks.apb2_timer_freq;
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// register callback function
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callback1 = cb;
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irqn = TIM1_UP_IRQn; //every update
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irq_priority = TIM1_IRQ_PRIORITY;
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// enable timer clocking
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RCC->APB2ENR |= 1<<11;
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break;
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case (uint32_t)TIM2:
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// get clocks config
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*clk = sysclks.apb1_timer_freq;
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// register callback function
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callback2 = cb;
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irqn = TIM2_IRQn;
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irq_priority = TIM2_IRQ_PRIORITY;
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// enable timer clocking
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RCC->APB1ENR |= 1<<0;
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break;
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case (uint32_t)TIM3:
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// get clocks config
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*clk = sysclks.apb1_timer_freq;
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// register callback function
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callback3 = cb;
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irqn = TIM3_IRQn;
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irq_priority = TIM3_IRQ_PRIORITY;
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// enable timer clocking
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RCC->APB1ENR |= 1<<1;
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break;
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case (uint32_t)TIM4:
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// get clocks config
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*clk = sysclks.apb1_timer_freq;
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// register callback function
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callback4 = cb;
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irqn = TIM4_IRQn;
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irq_priority = TIM4_IRQ_PRIORITY;
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// enable timer clocking
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RCC->APB1ENR |= 1<<2;
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break;
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default:
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return -1;
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}
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// clear pending interrupts
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tmr->SR &= !1;
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// Enable interrupts
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tmr->DIER = (1<<0);
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NVIC_SetPriority(irqn,irq_priority);
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NVIC_EnableIRQ(irqn);
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return 0;
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}
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//------------------------------------------------------------------------------
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int timer_wait_ms(TIM_TypeDef* tmr, uint16_t ms, OnTick cb) {
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uint32_t clk = 0;
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if(!cb) { //blocking
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//get clocks config
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if (tmr == TIM1) {
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clk = sysclks.apb2_timer_freq;
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RCC->APB2ENR |= 1<<11;
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}
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else {
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clk = sysclks.apb1_timer_freq;
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if (tmr == TIM2) RCC->APB1ENR |= 1<<0;
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else if (tmr == TIM3) RCC->APB1ENR |= 1<<1;
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else if (tmr == TIM4) RCC->APB1ENR |= 1<<2;
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else return -1; // no such timer
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}
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// set period
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tmr->ARR = 0xFFFFFFFF;
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} else { //non-blocking
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if(timer_config_cb(tmr, &clk, cb)) return -1;
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// set period
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tmr->ARR = ms-1;
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}
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// set mode
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tmr->CR1 = (1<<7) | (1<<2); //buffering and update settings
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tmr->CR1 |= (1<<3); //one pulse mode
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// set prescaler 1ms
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tmr->PSC = 8*(clk/1000)-1; //PSC = clk/f - 1 | don't know why 8 times..
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timer_start(tmr);
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if(!cb) {
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while(tmr->CNT < ms); //waiting for end of delay
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}
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return 0;
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}
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int timer_wait_us(TIM_TypeDef* tmr, uint16_t us, OnTick cb) {
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uint32_t clk = 0;
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if(!cb) { //blocking
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//get clocks config
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if (tmr == TIM1) {
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clk = sysclks.apb2_timer_freq;
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RCC->APB2ENR |= 1<<11;
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}
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else {
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clk = sysclks.apb1_timer_freq;
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if (tmr == TIM2) RCC->APB1ENR |= 1<<0;
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else if (tmr == TIM3) RCC->APB1ENR |= 1<<1;
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else if (tmr == TIM4) RCC->APB1ENR |= 1<<2;
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else return -1; // no such timer
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}
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// set period
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tmr->ARR = 0xFFFFFFFF;
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} else { //non-blocking
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if(timer_config_cb(tmr, &clk, cb)) return -1;
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// set period
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tmr->ARR = us-1;
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}
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// set mode
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tmr->CR1 = (1<<7) | (1<<2); //buffering and update settings
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tmr->CR1 |= (1<<3); //one pulse mode
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// set prescaler 1us
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tmr->PSC = 8*(clk/1000000)-1; //PSC = clk/f - 1 | don't know why 8 times..
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timer_start(tmr);
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if(!cb) {
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while(tmr->CNT < us); //waiting for end of delay
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}
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return 0;
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}
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//------------------------------------------------------------------------------
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int timer_tick_init(TIM_TypeDef *tmr, uint16_t tick_ms, OnTick cb) {
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IRQn_Type irqn;
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uint32_t irq_priority, clk;
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switch((uint32_t)tmr) {
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case (uint32_t)TIM1:
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// get back the clock frequency
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clk = sysclks.apb2_timer_freq;
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// register callback function
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callback1 = cb;
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irqn = TIM1_UP_IRQn; //every update
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irq_priority = TIM1_IRQ_PRIORITY;
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// enable timer clocking
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RCC->APB2ENR |= 1<<11;
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break;
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case (uint32_t)TIM2:
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// get back the clock frequency
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clk = sysclks.apb1_timer_freq;
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// register callback function
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callback2 = cb;
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irqn = TIM2_IRQn;
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irq_priority = TIM2_IRQ_PRIORITY;
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// enable timer clocking
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RCC->APB1ENR |= 1<<0;
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break;
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case (uint32_t)TIM3:
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// get back the clock frequency
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clk = sysclks.apb1_timer_freq;
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// register callback function
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callback3 = cb;
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irqn = TIM3_IRQn;
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irq_priority = TIM3_IRQ_PRIORITY;
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// enable timer clocking
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RCC->APB1ENR |= 1<<1;
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break;
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case (uint32_t)TIM4:
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// get back the clock frequency
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clk = sysclks.apb1_timer_freq;
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// register callback function
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callback4 = cb;
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irqn = TIM4_IRQn;
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irq_priority = TIM4_IRQ_PRIORITY;
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// enable timer clocking
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RCC->APB1ENR |= 1<<2;
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break;
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default:
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return -1;
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}
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// clear pending interrupts
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tmr->SR &= !1;
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// set mode
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tmr->CR1 = (1<<7) | (1<<2); //buffering and update settings
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tmr->DIER = (1<<0); //Enable interrupts
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// set prescaler 0.5ms
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tmr->PSC = 8*(clk/2000)-1; //PSC = clk/f - 1 | don't know why 8 times...
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// set period
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if(timer_set_period(tmr, tick_ms)) return -1;
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if (cb) {
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NVIC_SetPriority(irqn,irq_priority);
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NVIC_EnableIRQ(irqn); //unmask IRQ
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}
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return 0;
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}
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int timer_set_period(TIM_TypeDef *tmr, uint16_t tick) {
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// set period
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tmr->ARR = tick*2-1; //tickms = (ARR+1)Tpsc
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// force update to reset counter and apply prescaler
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tmr->EGR |= 1;
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return 0;
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}
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void timer_start(TIM_TypeDef *tmr) {
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// force update to reset counter and prescaler
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tmr->EGR |= 1;
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// enable counting
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tmr->CR1 |= 1;
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}
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void timer_stop(TIM_TypeDef *tmr) {
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// disable counting
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tmr->CR1 &= !1;
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}
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//------------------------------------------------------------------------------
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int timer_enc_init(TIM_TypeDef* tmr) {
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// enable timer
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switch((uint32_t)tmr) {
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case (uint32_t)TIM1:
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RCC->APB2ENR |= 1<<11;
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break;
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case (uint32_t)TIM2:
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RCC->APB1ENR |= 1<<0;
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break;
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case (uint32_t)TIM3:
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RCC->APB1ENR |= 1<<1;
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break;
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case (uint32_t)TIM4:
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RCC->APB1ENR |= 1<<2;
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break;
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default:
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return -1; //no such timer
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}
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//TODO set registers at reset value
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tmr->SMCR |= 0x1; //count on only one edge
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tmr->ARR = (1 << 16)-1;
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// map inputs
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tmr->CCMR1 |= 0x9;
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tmr->CCMR1 |= 0x9 << 8;
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// enable input channels and invert them //TODO add an otpion for that
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tmr->CCER |= 0x3;
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tmr->CCER |= 0x3 << 4;
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tmr->CR1 |= 0x1; //enable timer
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return 0;
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}
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