126 lines
2.7 KiB
C
126 lines
2.7 KiB
C
/** @file nvic.h
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* Module handling the Nested Vector Interrupt Controller (NVIC)
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*
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* The module provides functions to configure the different interrupts and
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* their priority suiing the NVIC's interface
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*/
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#ifndef _NVIC_H_
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#define _NVIC_H_
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//--includes--------------------------------------------------------------------
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#include "stdint.h"
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#include "stdbool.h"
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//--type definitions------------------------------------------------------------
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/**
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* Available System IRQs. This does not include CPU's IRQs
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*/
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enum NvicIrq {
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NVIC_IRQ_WWDG = 0,
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NVIC_IRQ_PVD,
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NVIC_IRQ_TAMPER,
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NVIC_IRQ_RTC,
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NVIC_IRQ_FLASH,
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NVIC_IRQ_RCC,
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NVIC_IRQ_EXTI0,
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NVIC_IRQ_EXTI1,
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NVIC_IRQ_EXTI2,
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NVIC_IRQ_EXTI3,
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NVIC_IRQ_EXTI4,
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NVIC_IRQ_DMA1_CHANNEL1,
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NVIC_IRQ_DMA1_CHANNEL2,
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NVIC_IRQ_DMA1_CHANNEL3,
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NVIC_IRQ_DMA1_CHANNEL4,
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NVIC_IRQ_DMA1_CHANNEL5,
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NVIC_IRQ_DMA1_CHANNEL6,
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NVIC_IRQ_DMA1_CHANNEL7,
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NVIC_IRQ_ADC1_2,
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NVIC_IRQ_HP_CAN_TX,
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NVIC_IRQ_LP_CAN_RX0,
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NVIC_IRQ_CAN_RX1,
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NVIC_IRQ_CAN_SCE,
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NVIC_IRQ_EXTI9_5,
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NVIC_IRQ_TIM1_BRK,
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NVIC_IRQ_TIM1_UP,
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NVIC_IRQ_TIM1_TRG_COM,
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NVIC_IRQ_TIM1_CC,
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NVIC_IRQ_TIM2,
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NVIC_IRQ_TIM3,
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NVIC_IRQ_TIM4,
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NVIC_IRQ_I2C1_EVENT,
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NVIC_IRQ_I2C1_ERROR,
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NVIC_IRQ_I2C2_EVENT,
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NVIC_IRQ_I2C2_ERROR,
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NVIC_IRQ_SPI1,
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NVIC_IRQ_SPI2,
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NVIC_IRQ_USART1,
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NVIC_IRQ_USART2,
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NVIC_IRQ_USART3,
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NVIC_IRQ_EXTI15_10,
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NVIC_IRQ_RTC_ALARM,
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NVIC_IRQ_USB_WAKEUP,
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NVIC_IRQ_TIM8_BRK,
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NVIC_IRQ_TIM8_UP,
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NVIC_IRQ_TIM8_TRG_COM,
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NVIC_IRQ_TIM8_CC,
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NVIC_IRQ_ADC3,
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NVIC_IRQ_FSMC,
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NVIC_IRQ_SDIO,
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NVIC_IRQ_TIM5,
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NVIC_IRQ_SPI3,
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NVIC_IRQ_UART4,
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NVIC_IRQ_UART5,
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NVIC_IRQ_TIM6,
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NVIC_IRQ_TIM7,
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NVIC_IRQ_DMA2_CHANNEL1,
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NVIC_IRQ_DMA2_CHANNEL2,
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NVIC_IRQ_DMA2_CHANNEL3,
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NVIC_IRQ_DMA2_CHANNEL4_5,
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};
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//--functions-------------------------------------------------------------------
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/**
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* Enables the selected IRQ
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*/
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void nvic_enable(enum NvicIrq irq);
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/**
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* Disables the selected IRQ
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*/
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void nvic_disable(enum NvicIrq irq);
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/**
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* Clears the pending state of an IRQ. Should be called when reaching an IRQ
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* handler so that the IRQ isn't triggered again when exiting the handler
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*/
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void nvic_clear_pending(enum NvicIrq irq);
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/**
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* Sets the priority for the selected IRQ. The lower the priority value, the
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* higher the effective priority. Valid priority values range from 0 to 15. Any
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* higher value will be ignored. When multiple IRQs with the same priority are
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* triggered, they will be serviced from the lowest ID to the highest
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*/
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void nvic_set_priority(enum NvicIrq irq, uint8_t priority);
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/**
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* Sets the selected IRQ's pending state. If the IRQ is active, it will be
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* triggered
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*/
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void nvic_set_pending(enum NvicIrq irq);
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/**
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* Returns wether the selected IRQ is currently pending or not
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*/
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bool nvic_is_pending(enum NvicIrq irq);
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#endif //_RCC_H_
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