469 lines
13 KiB
C
469 lines
13 KiB
C
/** @file rcc_regs.h
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* Module defining Reset and Clocks Control (RCC) registers.
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*
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* Mainly made to be used by the rcc module. It is recommanded to go through
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* the functions provided by that module instead of directly using the registers
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* defined here.
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*/
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#ifndef _RCC_REGS_H_
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#define _RCC_REGS_H_
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//--includes--------------------------------------------------------------------
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#include "reg.h"
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#include "stdint.h"
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//--type definitions------------------------------------------------------------
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#define RCC_BASE_ADDRESS 0x40021000
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union RCC_CR {
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struct __attribute__((packed)) {
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uint32_t HSION:1;
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uint32_t HSIRDY:1;
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uint32_t reserved1:1;
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uint32_t HSITRIM:5;
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uint32_t HSICAL:8;
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uint32_t HSEON:1;
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uint32_t HSERDY:1;
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uint32_t HSEBYP:1;
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uint32_t CCSON:1;
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uint32_t reserved2:4;
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uint32_t PLLON:1;
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uint32_t PLLRDY:1;
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uint32_t reserved3:6;
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};
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uint32_t word;
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};
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#define RCC_CR_HSION reg_def( 0, 1)
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#define RCC_CR_HSIRDY reg_def( 1, 1)
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#define RCC_CR_reserved1 reg_def( 2, 1)
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#define RCC_CR_HSITRIM reg_def( 3, 5)
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#define RCC_CR_HSICAL reg_def( 8, 8)
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#define RCC_CR_HSEON reg_def(16, 1)
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#define RCC_CR_HSERDY reg_def(17, 1)
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#define RCC_CR_HSEBYP reg_def(18, 1)
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#define RCC_CR_CCSON reg_def(19, 1)
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#define RCC_CR_reserved2 reg_def(20, 4)
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#define RCC_CR_PLLON reg_def(24, 1)
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#define RCC_CR_PLLRDY reg_def(25, 1)
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#define RCC_CR_reserved3 reg_def(26, 6)
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union RCC_CFGR {
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struct __attribute__((packed)) {
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uint32_t SW:2;
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uint32_t SWS:2;
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uint32_t HPRE:4;
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uint32_t PPRE1:3;
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uint32_t PPRE2:3;
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uint32_t ADCPRE:2;
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uint32_t PLLSCR:1;
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uint32_t PLLXTPRE:1;
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uint32_t PLLMUL:4;
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uint32_t USBPRE:1;
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uint32_t reserved1:1;
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uint32_t MCO:3;
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uint32_t reserved2:5;
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};
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uint32_t word;
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};
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#define RCC_CFGR_SW reg_def( 0, 2)
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#define RCC_CFGR_SWS reg_def( 2, 2)
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#define RCC_CFGR_HPRE reg_def( 4, 4)
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#define RCC_CFGR_PPRE1 reg_def( 8, 3)
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#define RCC_CFGR_PPRE2 reg_def(11, 3)
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#define RCC_CFGR_ADCPRE reg_def(14, 2)
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#define RCC_CFGR_PLLSCR reg_def(16, 1)
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#define RCC_CFGR_PLLXTPRE reg_def(17, 1)
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#define RCC_CFGR_PLLMUL reg_def(18, 4)
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#define RCC_CFGR_USBPRE reg_def(22, 1)
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#define RCC_CFGR_reserved1 reg_def(23, 1)
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#define RCC_CFGR_MCO reg_def(24, 3)
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#define RCC_CFGR_reserved2 reg_def(27, 5)
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union RCC_CIR {
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struct __attribute__((packed)) {
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uint32_t LSIRDYF:1;
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uint32_t LSERDYF:1;
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uint32_t HSIRDYF:1;
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uint32_t HSERDYF:1;
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uint32_t PLLRDYF:1;
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uint32_t reserved1:2;
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uint32_t CSSF:1;
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uint32_t LSIRDYIE:1;
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uint32_t LSERDYIE:1;
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uint32_t HSIRDYIE:1;
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uint32_t HSERDYIE:1;
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uint32_t PLLRDYIE:1;
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uint32_t RSE2:3;
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uint32_t LSIRDYC:1;
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uint32_t LSERDYC:1;
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uint32_t HSIRDYC:1;
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uint32_t HSERDYC:1;
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uint32_t PLLRDYC:1;
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uint32_t reserved3:2;
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uint32_t CSSC:1;
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uint32_t reserved4:8;
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};
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uint32_t word;
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};
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#define RCC_CIR_LSIRDYF reg_def( 0, 1)
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#define RCC_CIR_LSERDYF reg_def( 1, 1)
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#define RCC_CIR_HSIRDYF reg_def( 2, 1)
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#define RCC_CIR_HSERDYF reg_def( 3, 1)
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#define RCC_CIR_PLLRDYF reg_def( 4, 1)
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#define RCC_CIR_reserved1 reg_def( 5, 2)
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#define RCC_CIR_CSSF reg_def( 7, 1)
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#define RCC_CIR_LSIRDYIE reg_def( 8, 1)
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#define RCC_CIR_LSERDYIE reg_def( 9, 1)
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#define RCC_CIR_HSIRDYIE reg_def(10, 1)
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#define RCC_CIR_HSERDYIE reg_def(11, 1)
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#define RCC_CIR_PLLRDYIE reg_def(12, 1)
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#define RCC_CIR_RSE2 reg_def(13, 3)
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#define RCC_CIR_LSIRDYC reg_def(16, 1)
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#define RCC_CIR_LSERDYC reg_def(17, 1)
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#define RCC_CIR_HSIRDYC reg_def(18, 1)
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#define RCC_CIR_HSERDYC reg_def(19, 1)
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#define RCC_CIR_PLLRDYC reg_def(20, 1)
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#define RCC_CIR_reserved3 reg_def(21, 2)
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#define RCC_CIR_CSSC reg_def(23, 1)
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#define RCC_CIR_reserved4 reg_def(24, 8)
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union RCC_APB2RSTR {
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struct __attribute__((packed)) {
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uint32_t AFIORST:1;
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uint32_t reserved1:1;
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uint32_t IOPARST:1;
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uint32_t IOPBRST:1;
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uint32_t IOPCRST:1;
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uint32_t IOPDRST:1;
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uint32_t IOPERST:1;
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uint32_t IOPFRST:1;
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uint32_t IOPGRST:1;
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uint32_t ADC1RST:1;
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uint32_t ACD2RST:1;
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uint32_t TIM1RST:1;
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uint32_t SPI1RST:1;
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uint32_t TIM8RST:1;
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uint32_t USART1RST:1;
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uint32_t ADC3RST:1;
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uint32_t reserved2:3;
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uint32_t TIM9RST:1;
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uint32_t TIM10RST:1;
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uint32_t TIM11RST:1;
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uint32_t reserved3:10;
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};
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uint32_t word;
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};
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#define RCC_APB2RSTR_AFIORST reg_def( 0, 1)
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#define RCC_APB2RSTR_reserved1 reg_def( 1, 1)
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#define RCC_APB2RSTR_IOPARST reg_def( 2, 1)
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#define RCC_APB2RSTR_IOPBRST reg_def( 3, 1)
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#define RCC_APB2RSTR_IOPCRST reg_def( 4, 1)
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#define RCC_APB2RSTR_IOPDRST reg_def( 5, 1)
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#define RCC_APB2RSTR_IOPERST reg_def( 6, 1)
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#define RCC_APB2RSTR_IOPFRST reg_def( 7, 1)
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#define RCC_APB2RSTR_IOPGRST reg_def( 8, 1)
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#define RCC_APB2RSTR_ADC1RST reg_def( 9, 1)
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#define RCC_APB2RSTR_ACD2RST reg_def(10, 1)
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#define RCC_APB2RSTR_TIM1RST reg_def(11, 1)
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#define RCC_APB2RSTR_SPI1RST reg_def(12, 1)
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#define RCC_APB2RSTR_TIM8RST reg_def(13, 1)
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#define RCC_APB2RSTR_USART1RST reg_def(14, 1)
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#define RCC_APB2RSTR_ADC3RST reg_def(15, 1)
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#define RCC_APB2RSTR_reserved2 reg_def(16, 3)
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#define RCC_APB2RSTR_TIM9RST reg_def(19, 1)
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#define RCC_APB2RSTR_TIM10RST reg_def(20, 1)
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#define RCC_APB2RSTR_TIM11RST reg_def(21, 1)
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#define RCC_APB2RSTR_reserved3 reg_def(22, 10)
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union RCC_APB1RSTR {
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struct __attribute__((packed)) {
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uint32_t TIM2RST:1;
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uint32_t TIM3RST:1;
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uint32_t TIM4RST:1;
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uint32_t TIM5RST:1;
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uint32_t TIM6RST:1;
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uint32_t TIM7RST:1;
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uint32_t TIM12RST:1;
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uint32_t TIM13RST:1;
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uint32_t TIM14RST:1;
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uint32_t reserved1:2;
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uint32_t WWDGRST:1;
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uint32_t reserved2:2;
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uint32_t SPI2RST:1;
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uint32_t SPI3RST:1;
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uint32_t reserved3:1;
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uint32_t USART2RST:1;
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uint32_t USART3RST:1;
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uint32_t UART4RST:1;
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uint32_t UART5RST:1;
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uint32_t I2C12RST:1;
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uint32_t I2C2RST:1;
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uint32_t USB2RST:1;
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uint32_t reserved4:1;
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uint32_t CANRST:1;
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uint32_t reserved5:1;
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uint32_t BKPRST:1;
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uint32_t PWRRST:1;
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uint32_t DACRST:1;
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uint32_t reserved6:2;
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};
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uint32_t word;
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};
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#define RCC_APB1RSTR_TIM2RST reg_def( 0, 1)
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#define RCC_APB1RSTR_TIM3RST reg_def( 1, 1)
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#define RCC_APB1RSTR_TIM4RST reg_def( 2, 1)
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#define RCC_APB1RSTR_TIM5RST reg_def( 3, 1)
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#define RCC_APB1RSTR_TIM6RST reg_def( 4, 1)
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#define RCC_APB1RSTR_TIM7RST reg_def( 5, 1)
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#define RCC_APB1RSTR_TIM12RST reg_def( 6, 1)
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#define RCC_APB1RSTR_TIM13RST reg_def( 7, 1)
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#define RCC_APB1RSTR_TIM14RST reg_def( 8, 1)
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#define RCC_APB1RSTR_reserved1 reg_def( 9, 2)
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#define RCC_APB1RSTR_WWDGRST reg_def(11, 1)
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#define RCC_APB1RSTR_reserved2 reg_def(12, 2)
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#define RCC_APB1RSTR_SPI2RST reg_def(14, 1)
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#define RCC_APB1RSTR_SPI3RST reg_def(15, 1)
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#define RCC_APB1RSTR_reserved3 reg_def(16, 1)
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#define RCC_APB1RSTR_USART2RST reg_def(17, 1)
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#define RCC_APB1RSTR_USART3RST reg_def(18, 1)
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#define RCC_APB1RSTR_UART4RST reg_def(19, 1)
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#define RCC_APB1RSTR_UART5RST reg_def(20, 1)
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#define RCC_APB1RSTR_I2C12RST reg_def(21, 1)
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#define RCC_APB1RSTR_I2C2RST reg_def(22, 1)
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#define RCC_APB1RSTR_USB2RST reg_def(23, 1)
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#define RCC_APB1RSTR_reserved4 reg_def(24, 1)
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#define RCC_APB1RSTR_CANRST reg_def(25, 1)
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#define RCC_APB1RSTR_reserved5 reg_def(26, 1)
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#define RCC_APB1RSTR_BKPRST reg_def(27, 1)
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#define RCC_APB1RSTR_PWRRST reg_def(28, 1)
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#define RCC_APB1RSTR_DACRST reg_def(29, 1)
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#define RCC_APB1RSTR_reserved6 reg_def(30, 2)
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union RCC_AHBENR {
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struct __attribute__((packed)) {
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uint32_t DMA1EN:1;
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uint32_t DMA2EN:1;
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uint32_t SRAMEN:1;
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uint32_t reserved1:1;
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uint32_t FLITFEN:1;
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uint32_t reserved2:1;
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uint32_t CRCEN:1;
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uint32_t reserved3:1;
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uint32_t FSMCEN:1;
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uint32_t reserved4:1;
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uint32_t SDIOEN:1;
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uint32_t reserved5:21;
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};
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uint32_t word;
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};
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#define RCC_AHBENR_DMA1EN reg_def( 0, 1)
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#define RCC_AHBENR_DMA2EN reg_def( 1, 1)
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#define RCC_AHBENR_SRAMEN reg_def( 2, 1)
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#define RCC_AHBENR_reserved1 reg_def( 3, 1)
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#define RCC_AHBENR_FLITFEN reg_def( 4, 1)
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#define RCC_AHBENR_reserved2 reg_def( 5, 1)
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#define RCC_AHBENR_CRCEN reg_def( 6, 1)
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#define RCC_AHBENR_reserved3 reg_def( 7, 1)
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#define RCC_AHBENR_FSMCEN reg_def( 8, 1)
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#define RCC_AHBENR_reserved4 reg_def( 9, 1)
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#define RCC_AHBENR_SDIOEN reg_def(10, 1)
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#define RCC_AHBENR_reserved5 reg_def(11, 21)
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union RCC_APB2ENR {
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struct __attribute__((packed)) {
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uint32_t AFIOEN:1;
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uint32_t reserved1:1;
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uint32_t IOPAEN:1;
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uint32_t IOPBEN:1;
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uint32_t IOPCEN:1;
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uint32_t IOPDEN:1;
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uint32_t IOPEEN:1;
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uint32_t IOPFEN:1;
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uint32_t IOPGEN:1;
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uint32_t ADC1EN:1;
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uint32_t ACD2EN:1;
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uint32_t TIM1EN:1;
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uint32_t SPI1EN:1;
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uint32_t TIM8EN:1;
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uint32_t USART1EN:1;
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uint32_t ADC3EN:1;
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uint32_t reserved2:3;
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uint32_t TIM9EN:1;
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uint32_t TIM10EN:1;
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uint32_t TIM11EN:1;
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uint32_t reserved3:10;
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};
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uint32_t word;
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};
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#define RCC_APB2ENR_AFIOEN reg_def( 0, 1)
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#define RCC_APB2ENR_reserved1 reg_def( 1, 1)
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#define RCC_APB2ENR_IOPAEN reg_def( 2, 1)
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#define RCC_APB2ENR_IOPBEN reg_def( 3, 1)
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#define RCC_APB2ENR_IOPCEN reg_def( 4, 1)
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#define RCC_APB2ENR_IOPDEN reg_def( 5, 1)
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#define RCC_APB2ENR_IOPEEN reg_def( 6, 1)
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#define RCC_APB2ENR_IOPFEN reg_def( 7, 1)
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#define RCC_APB2ENR_IOPGEN reg_def( 8, 1)
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#define RCC_APB2ENR_ADC1EN reg_def( 9, 1)
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#define RCC_APB2ENR_ACD2EN reg_def(10, 1)
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#define RCC_APB2ENR_TIM1EN reg_def(11, 1)
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#define RCC_APB2ENR_SPI1EN reg_def(12, 1)
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#define RCC_APB2ENR_TIM8EN reg_def(13, 1)
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#define RCC_APB2ENR_USART1EN reg_def(14, 1)
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#define RCC_APB2ENR_ADC3EN reg_def(15, 1)
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#define RCC_APB2ENR_reserved2 reg_def(16, 3)
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#define RCC_APB2ENR_TIM9EN reg_def(19, 1)
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#define RCC_APB2ENR_TIM10EN reg_def(20, 1)
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#define RCC_APB2ENR_TIM11EN reg_def(21, 1)
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#define RCC_APB2ENR_reserved3 reg_def(22, 10)
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union RCC_APB1ENR {
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struct __attribute__((packed)) {
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uint32_t TIM2EN:1;
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uint32_t TIM3EN:1;
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uint32_t TIM4EN:1;
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uint32_t TIM5EN:1;
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uint32_t TIM6EN:1;
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uint32_t TIM7EN:1;
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uint32_t TIM12EN:1;
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uint32_t TIM13EN:1;
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uint32_t TIM14EN:1;
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uint32_t reserved1:2;
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uint32_t WWDGEN:1;
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uint32_t reserved2:2;
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uint32_t SPI2EN:1;
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uint32_t SPI3EN:1;
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uint32_t reserved3:1;
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uint32_t USART2EN:1;
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uint32_t USART3EN:1;
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uint32_t UART4EN:1;
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uint32_t UART5EN:1;
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uint32_t I2C12EN:1;
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uint32_t I2C2EN:1;
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uint32_t USB2EN:1;
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uint32_t reserved4:1;
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uint32_t CANEN:1;
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uint32_t reserved5:1;
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uint32_t BKPEN:1;
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uint32_t PWREN:1;
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uint32_t DACEN:1;
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uint32_t reserved6:2;
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};
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uint32_t word;
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};
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#define RCC_APB1ENR_TIM2EN reg_def( 0, 1)
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#define RCC_APB1ENR_TIM3EN reg_def( 1, 1)
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#define RCC_APB1ENR_TIM4EN reg_def( 2, 1)
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#define RCC_APB1ENR_TIM5EN reg_def( 3, 1)
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#define RCC_APB1ENR_TIM6EN reg_def( 4, 1)
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#define RCC_APB1ENR_TIM7EN reg_def( 5, 1)
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#define RCC_APB1ENR_TIM12EN reg_def( 6, 1)
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#define RCC_APB1ENR_TIM13EN reg_def( 7, 1)
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#define RCC_APB1ENR_TIM14EN reg_def( 8, 1)
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#define RCC_APB1ENR_reserved1 reg_def( 9, 2)
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#define RCC_APB1ENR_WWDGEN reg_def(11, 1)
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#define RCC_APB1ENR_reserved reg_def(12, 2)
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#define RCC_APB1ENR_SPI2EN reg_def(14, 1)
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#define RCC_APB1ENR_SPI3EN reg_def(15, 1)
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#define RCC_APB1ENR_reserved2 reg_def(16, 1)
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#define RCC_APB1ENR_USART2EN reg_def(17, 1)
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#define RCC_APB1ENR_USART3EN reg_def(18, 1)
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#define RCC_APB1ENR_UART4EN reg_def(19, 1)
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#define RCC_APB1ENR_UART5EN reg_def(20, 1)
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#define RCC_APB1ENR_I2C12EN reg_def(21, 1)
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#define RCC_APB1ENR_I2C2EN reg_def(22, 1)
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#define RCC_APB1ENR_USB2EN reg_def(23, 1)
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#define RCC_APB1ENR_reserved3 reg_def(24, 1)
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#define RCC_APB1ENR_CANEN reg_def(25, 1)
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#define RCC_APB1ENR_reserved4 reg_def(26, 1)
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#define RCC_APB1ENR_BKPEN reg_def(27, 1)
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#define RCC_APB1ENR_PWREN reg_def(28, 1)
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#define RCC_APB1ENR_DACEN reg_def(29, 1)
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#define RCC_APB1ENR_reserved5 reg_def(30, 2)
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union RCC_BDCR {
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struct __attribute__((packed)) {
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uint32_t LSEON:1;
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uint32_t LSERDY:1;
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uint32_t LSEBYP:1;
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uint32_t reserved1:5;
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uint32_t RTCSEL:2;
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uint32_t reserved2:5;
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uint32_t RTCEN:1;
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uint32_t BDRST:1;
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uint32_t reserved3:15;
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};
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uint32_t word;
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};
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#define RCC_BDCR_LSEON reg_def( 0, 1)
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#define RCC_BDCR_LSERDY reg_def( 1, 1)
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#define RCC_BDCR_LSEBYP reg_def( 2, 1)
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#define RCC_BDCR_reserved1 reg_def( 3, 5)
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#define RCC_BDCR_RTCSEL reg_def( 8, 2)
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#define RCC_BDCR_reserved2 reg_def(10, 5)
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#define RCC_BDCR_RTCEN reg_def(15, 1)
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#define RCC_BDCR_BDRST reg_def(16, 1)
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#define RCC_BDCR_reserved3 reg_def(17, 15)
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union RCC_CSR {
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struct __attribute__((packed)) {
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uint32_t LSION:1;
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uint32_t LSIRDY:1;
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uint32_t reserved1:22;
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uint32_t RMVF:1;
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uint32_t reserved2:1;
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uint32_t PINRSTF:1;
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uint32_t PORRSTF:1;
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uint32_t SFTRSTF:1;
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uint32_t IWDGRSTF:1;
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uint32_t WWDGRSTF:1;
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uint32_t LPWRSTF:1;
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};
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uint32_t word;
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};
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#define RCC_CSR_LSION reg_def( 0, 1)
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#define RCC_CSR_LSIRDY reg_def( 1, 1)
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#define RCC_CSR_reserved1 reg_def( 2, 22)
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#define RCC_CSR_RMVF reg_def(24, 1)
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#define RCC_CSR_reserved2 reg_def(25, 1)
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#define RCC_CSR_PINRSTF reg_def(26, 1)
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#define RCC_CSR_PORRSTF reg_def(27, 1)
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#define RCC_CSR_SFTRSTF reg_def(28, 1)
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#define RCC_CSR_IWDGRSTF reg_def(29, 1)
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#define RCC_CSR_WWDGRSTF reg_def(30, 1)
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#define RCC_CSR_LPWRSTF reg_def(31, 1)
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struct __attribute__((packed)) RCC {
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union RCC_CR CR;
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union RCC_CFGR CFGR;
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union RCC_CIR CIR;
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union RCC_APB2RSTR APB2RSTR;
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union RCC_APB1RSTR APB1RSTR;
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union RCC_AHBENR AHBENR;
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union RCC_APB2ENR APB2ENR;
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union RCC_APB1ENR APB1ENR;
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union RCC_BDCR BDCR;
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union RCC_CSR CSR;
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};
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//--functions-------------------------------------------------------------------
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#endif //_RCC_REGS_H_
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