rework #4

Merged
Steins7 merged 88 commits from rework into dev 2024-04-20 18:20:23 +00:00
6 changed files with 28 additions and 29 deletions
Showing only changes of commit 4464156981 - Show all commits

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@ -12,6 +12,10 @@
//--local definitions----------------------------------------------------------- //--local definitions-----------------------------------------------------------
#define DMA_CONFIG (DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_PERIPH \
| DMA_CONFIG_CIRCULAR | DMA_CONFIG_INC_MEM \
| DMA_CONFIG_PSIZE_8BITS | DMA_CONFIG_MSIZE_8BITS)
static void cbuf_callback(enum DmaIRQSource src, volatile void* param); static void cbuf_callback(enum DmaIRQSource src, volatile void* param);
@ -21,7 +25,7 @@ static void cbuf_callback(enum DmaIRQSource src, volatile void* param);
void dma_cbuf_configure(volatile struct DmaCircBuffer* buffer, void dma_cbuf_configure(volatile struct DmaCircBuffer* buffer,
volatile void* raw_buffer, volatile void* src, uint16_t buffer_size, volatile void* raw_buffer, volatile void* src, uint16_t buffer_size,
enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig config) enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig priority)
{ {
#warning "check for null ptr" #warning "check for null ptr"
@ -33,7 +37,7 @@ void dma_cbuf_configure(volatile struct DmaCircBuffer* buffer,
buffer->dma = dma; buffer->dma = dma;
buffer->channel = channel; buffer->channel = channel;
buffer->config = config; buffer->config = DMA_CONFIG | priority;
buffer->dma_looped = false; buffer->dma_looped = false;

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@ -34,7 +34,7 @@ struct DmaCircBuffer {
void dma_cbuf_configure(volatile struct DmaCircBuffer* buffer, void dma_cbuf_configure(volatile struct DmaCircBuffer* buffer,
volatile void* raw_buffer, volatile void* src, uint16_t buffer_size, volatile void* raw_buffer, volatile void* src, uint16_t buffer_size,
enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig config); enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig priority);
uint32_t dma_cbuf_read_byte(volatile struct DmaCircBuffer* buffer, uint32_t dma_cbuf_read_byte(volatile struct DmaCircBuffer* buffer,
uint8_t* byte); uint8_t* byte);

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@ -12,6 +12,10 @@
//--local definitions----------------------------------------------------------- //--local definitions-----------------------------------------------------------
#define DMA_CONFIG (DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_MEM \
| DMA_CONFIG_INC_MEM | DMA_CONFIG_PSIZE_8BITS \
| DMA_CONFIG_MSIZE_8BITS)
static void mbuf_callback(enum DmaIRQSource src, volatile void* param); static void mbuf_callback(enum DmaIRQSource src, volatile void* param);
@ -21,7 +25,7 @@ static void mbuf_callback(enum DmaIRQSource src, volatile void* param);
void dma_mbuf_configure(volatile struct DmaMultiBuffer* buffer, void** buffers, void dma_mbuf_configure(volatile struct DmaMultiBuffer* buffer, void** buffers,
volatile void* dest, uint16_t buffer_size, uint8_t buffer_nb, volatile void* dest, uint16_t buffer_size, uint8_t buffer_nb,
enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig config) enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig priority)
{ {
#warning "check for null ptr" #warning "check for null ptr"
@ -38,7 +42,7 @@ void dma_mbuf_configure(volatile struct DmaMultiBuffer* buffer, void** buffers,
buffer->dma = dma; buffer->dma = dma;
buffer->channel = channel; buffer->channel = channel;
buffer->config = config; buffer->config = DMA_CONFIG | priority;
} }
uint32_t dma_mbuf_write_byte(volatile struct DmaMultiBuffer* buffer, uint32_t dma_mbuf_write_byte(volatile struct DmaMultiBuffer* buffer,

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@ -43,9 +43,8 @@ struct DmaMultiBuffer {
/** /**
* Configure a DMA multibuffer for a single DMA channel. A list of buffers is * Configure a DMA multibuffer for a single DMA channel. A list of buffers is
* used to allow concurent write and DMA tranfers to the specified destination * used to allow concurent write and DMA tranfers to the specified destination
* wich must be a peripheral. The exact DMA configuration to use is also given * wich must be a peripheral. The DMA's priority is also given as parameters.
* as parameters. The peripheral's specific configuration must be handled * The peripheral's specific configuration must be handled separately.
* separately.
* *
* This system needs to be started manually: dma_mbuf_refresh() should be called * This system needs to be started manually: dma_mbuf_refresh() should be called
* whenever a DMA transfer can be started. This can be done manually after * whenever a DMA transfer can be started. This can be done manually after
@ -54,7 +53,7 @@ struct DmaMultiBuffer {
*/ */
void dma_mbuf_configure(volatile struct DmaMultiBuffer* buffer, void** buffers, void dma_mbuf_configure(volatile struct DmaMultiBuffer* buffer, void** buffers,
volatile void* dest, uint16_t buffer_size, uint8_t buffer_nb, volatile void* dest, uint16_t buffer_size, uint8_t buffer_nb,
enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig config); enum DmaPeriph dma, enum DmaChannel channel, enum DmaConfig priority);
/** /**
* Write the given byte to the given buffer. Returns 0 if the write operation * Write the given byte to the given buffer. Returns 0 if the write operation

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@ -22,16 +22,6 @@
//--local definitions----------------------------------------------------------- //--local definitions-----------------------------------------------------------
#define DMA_TX_CONFIG (DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_MEM \
| DMA_CONFIG_INC_MEM | DMA_CONFIG_PSIZE_8BITS \
| DMA_CONFIG_MSIZE_8BITS | DMA_CONFIG_PRIO_LOW)
#define DMA_RX_CONFIG (DMA_CONFIG_IRQ_COMPLETE | DMA_CONFIG_FROM_PERIPH \
| DMA_CONFIG_CIRCULAR | DMA_CONFIG_INC_MEM \
| DMA_CONFIG_PSIZE_8BITS | DMA_CONFIG_MSIZE_8BITS \
| DMA_CONFIG_PRIO_LOW)
static void configure_usart(volatile struct USART* regs, static void configure_usart(volatile struct USART* regs,
enum UsartConfig config); enum UsartConfig config);
static void configure_baudrate(volatile struct USART* regs, uint32_t clock, static void configure_baudrate(volatile struct USART* regs, uint32_t clock,
@ -174,45 +164,45 @@ uint32_t usart_read_byte(enum UsartPeriph periph, uint8_t* byte)
} }
void usart_set_tx_buffer(enum UsartPeriph periph, uint8_t** buffers, void usart_set_tx_buffer(enum UsartPeriph periph, uint8_t** buffers,
uint16_t buffer_size, uint8_t buffer_nb) uint16_t buffer_size, uint8_t buffer_nb, enum DmaConfig priority)
{ {
switch (periph) { switch (periph) {
case USART_PERIPH_1: case USART_PERIPH_1:
dma_mbuf_configure(&usart1_tx_buffer, (void**)buffers, &usart1->DR, dma_mbuf_configure(&usart1_tx_buffer, (void**)buffers, &usart1->DR,
buffer_size, buffer_nb, DMA_PERIPH_1, DMA_CHANNEL_4, buffer_size, buffer_nb, DMA_PERIPH_1, DMA_CHANNEL_4,
DMA_TX_CONFIG); priority);
break; break;
case USART_PERIPH_2: case USART_PERIPH_2:
dma_mbuf_configure(&usart2_tx_buffer, (void**)buffers, &usart2->DR, dma_mbuf_configure(&usart2_tx_buffer, (void**)buffers, &usart2->DR,
buffer_size, buffer_nb, DMA_PERIPH_1, DMA_CHANNEL_7, buffer_size, buffer_nb, DMA_PERIPH_1, DMA_CHANNEL_7,
DMA_TX_CONFIG); priority);
break; break;
case USART_PERIPH_3: case USART_PERIPH_3:
dma_mbuf_configure(&usart3_tx_buffer, (void**)buffers, &usart3->DR, dma_mbuf_configure(&usart3_tx_buffer, (void**)buffers, &usart3->DR,
buffer_size, buffer_nb, DMA_PERIPH_1, DMA_CHANNEL_2, buffer_size, buffer_nb, DMA_PERIPH_1, DMA_CHANNEL_2,
DMA_TX_CONFIG); priority);
break; break;
} }
} }
void usart_set_rx_buffer(enum UsartPeriph periph, uint8_t* buffer, void usart_set_rx_buffer(enum UsartPeriph periph, uint8_t* buffer,
uint16_t size) uint16_t size, enum DmaConfig priority)
{ {
switch (periph) { switch (periph) {
case USART_PERIPH_1: case USART_PERIPH_1:
dma_cbuf_configure(&usart1_rx_buffer, buffer, (void*)&usart1->DR, dma_cbuf_configure(&usart1_rx_buffer, buffer, (void*)&usart1->DR,
size, DMA_PERIPH_1, DMA_CHANNEL_5, DMA_RX_CONFIG); size, DMA_PERIPH_1, DMA_CHANNEL_5, priority);
reg_set(usart1->CR3, USART_CR3_DMAR); reg_set(usart1->CR3, USART_CR3_DMAR);
break; break;
case USART_PERIPH_2: case USART_PERIPH_2:
dma_cbuf_configure(&usart2_rx_buffer, buffer, (void*)&usart2->DR, dma_cbuf_configure(&usart2_rx_buffer, buffer, (void*)&usart2->DR,
size, DMA_PERIPH_1, DMA_CHANNEL_6, DMA_RX_CONFIG); size, DMA_PERIPH_1, DMA_CHANNEL_6, priority);
reg_set(usart2->CR3, USART_CR3_DMAR); reg_set(usart2->CR3, USART_CR3_DMAR);
break; break;
case USART_PERIPH_3: case USART_PERIPH_3:
dma_cbuf_configure(&usart3_rx_buffer, buffer, (void*)&usart3->DR, dma_cbuf_configure(&usart3_rx_buffer, buffer, (void*)&usart3->DR,
size, DMA_PERIPH_1, DMA_CHANNEL_3, DMA_RX_CONFIG); size, DMA_PERIPH_1, DMA_CHANNEL_3, priority);
reg_set(usart3->CR3, USART_CR3_DMAR); reg_set(usart3->CR3, USART_CR3_DMAR);
break; break;

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@ -10,6 +10,8 @@
//--includes-------------------------------------------------------------------- //--includes--------------------------------------------------------------------
#include "dma.h"
#include "stdint.h" #include "stdint.h"
@ -47,10 +49,10 @@ uint32_t usart_write_byte(enum UsartPeriph periph, uint8_t byte);
uint32_t usart_read_byte(enum UsartPeriph periph, uint8_t* byte); uint32_t usart_read_byte(enum UsartPeriph periph, uint8_t* byte);
void usart_set_tx_buffer(enum UsartPeriph periph, uint8_t** buffers, void usart_set_tx_buffer(enum UsartPeriph periph, uint8_t** buffers,
uint16_t buffer_size, uint8_t buffer_nb); uint16_t buffer_size, uint8_t buffer_nb, enum DmaConfig priority);
void usart_set_rx_buffer(enum UsartPeriph periph, uint8_t* buffer, void usart_set_rx_buffer(enum UsartPeriph periph, uint8_t* buffer,
uint16_t size); uint16_t size, enum DmaConfig priority);
#endif //_USART_H_ #endif //_USART_H_