Commit Graph

154 Commits

Author SHA1 Message Date
7cb33f65a5 Create new delay module 2024-05-14 15:03:18 +02:00
c09d2cda67 Remove priority parameter from tasks
In the end, priorities are only usefull in preemptive systems. Here, it would
only garentee the execution order, which we don't care about most of the time
2024-05-14 14:53:51 +02:00
34fb4dac76 Make stk_read function usable
This function used to return the raw current value, but that exposes the
prescaling used internaly
2024-04-30 20:17:58 +02:00
432310a52d Implement task module
For now, most code is temporary to validate that the system can work as
envisionned. Optimisations and cleaning will be done shortly
2024-04-30 20:15:58 +02:00
7e69bfd89c Document systick module 2024-04-28 22:11:37 +02:00
ddd05da6eb Implement systick module 2024-04-28 22:04:10 +02:00
7ba9063d02 Define systick's registers 2024-04-28 19:43:37 +02:00
fb1c11132f Write first API macros 2024-04-28 19:14:28 +02:00
Steins7
cbe6409f69 Merge pull request 'rework' (#4) from rework into dev
Reviewed-on: https://git.steins7.ovh/Steins7/stm32f1xx_HBL/pulls/4
2024-04-20 18:20:22 +00:00
Steins7
64e1a0c83d Merge pull request 'assert' (#3) from assert into rework
Reviewed-on: https://git.steins7.ovh/Steins7/stm32f1xx_HBL/pulls/3
2024-04-20 13:47:12 +00:00
47a06a2a39 Add asserts in existing code 2024-04-20 15:45:51 +02:00
a20acf4031 Implement error header 2024-04-20 15:20:18 +02:00
Steins7
eb0ca60aa1 Merge pull request 'debug' (#2) from debug into rework
Reviewed-on: https://git.steins7.ovh/Steins7/stm32f1xx_HBL/pulls/2
2024-04-20 11:15:31 +00:00
26f2b4d545 Document format module 2024-04-20 11:57:02 +02:00
12800818ce Document debug module 2024-04-20 11:44:56 +02:00
84deb788a0 Improve debug module architecture 2024-04-20 11:37:11 +02:00
254fec4f00 Disable zero padding for signed integers
zero padding is mostly used with unsiged integers, and is quite difficult to
properly implement for signed integers. Disbaling iti n that case seems like a
good compromise
2024-04-15 23:10:31 +02:00
0088322ee7 Fix warning 2024-04-15 23:10:19 +02:00
e477055e6e Implement right-justified padding 2024-04-15 22:56:49 +02:00
3bcb9c7df4 Add error handling 2024-04-15 17:17:23 +02:00
075d9e17a6 Changed internal functions to static 2024-04-15 17:17:05 +02:00
727aadaba9 Implement signed integer formating 2024-04-15 17:04:35 +02:00
3dc548332f Implement basic string formatting 2024-04-15 16:54:54 +02:00
0d5deffa58 Update debug service to use new dma_mbuf 2024-04-07 16:47:34 +02:00
Steins7
c26b1cd703 Merge pull request 'usart' (#1) from usart into rework
Reviewed-on: https://git.steins7.ovh/Steins7/stm32f1xx_HBL/pulls/1
2024-04-06 21:05:00 +00:00
cf077d2e51 Fix unwanted changes 2024-04-06 23:02:08 +02:00
4eec301d17 Optimize USART driver's code size
Using tables reduces code size while also improving lisibility. That is a
win-win
2024-04-06 22:56:28 +02:00
c6da4e11d8 Document USART driver 2024-04-06 22:19:19 +02:00
85e7ad5ef1 Document DMA driver 2024-04-06 17:26:56 +02:00
a1ae904239 Document dma_cbuf service 2024-04-06 16:59:57 +02:00
5e961b15fc Document dma_mbuf service 2024-04-06 16:57:36 +02:00
fd33003e26 Rework DMA buffer to work properly
DMA buffers now work reliably with USART. The DMA api has changed to make it
more efficient code-size-wise. This may, however, complicate things when
implementating powersaving features
2024-04-06 16:29:45 +02:00
7a19ae9223 Clean minor issues in startup.s 2024-04-06 16:28:08 +02:00
ccf36ac400 Simplify dma buffers and adjust usart
The dma buffer should be services that are used on top of peripherals. As such,
the usart driver should'nt directly use them, this is up to the user. The
multi-buffer has also been simplified since I was not satisfied with the
previous implementation
2024-04-03 22:03:15 +02:00
e1097048a6 RAM initialisation fixed in 086f915 2023-09-24 22:04:38 +02:00
b992e2b8fb First implementation of debug service
For now, only basic traces are implemented. The rest will follow once a printf
function is implemented
2023-09-24 22:02:20 +02:00
cc54ca7ca8 Improve mbuf fix
Byte index is now stored on 2 bytes. Macros have been made cleaner
2023-09-24 21:59:29 +02:00
0628c4c07c Use TC instead of TXE
Transfer Complete is preferable to TX Empty when using a DMA since we could be
polling the bit between transfers. TXE would be 1 but the DMA would be
transfering another at the same time. TC takes the DMA into account
2023-09-24 18:35:36 +02:00
dbfba20520 Temporary fix for mbuf's byte index
Each buffer should use its own byte index since the value would otherwise be
overwritten when writing to other buffers
2023-09-24 18:33:20 +02:00
a7099d5dfd Rename drivers folder to drv 2023-09-21 20:42:16 +02:00
086f9155f7 Fix RAM initialisation
The reset handler is responsible for loading the variables default values. This
includes variables initialized to 0, although they are handed through bss and
not data
2023-09-18 11:45:12 +02:00
4464156981 Move DMA config to buffers
Control over most parameters is not needed since they cannot change for the
buffer to work as expected. Only the priority should be adjustable
2023-09-17 17:52:14 +02:00
d84d9cef83 Move DMA's rx buffer to a separate module 2023-09-17 17:36:24 +02:00
e2adf48f82 Document dma multibuffer module 2023-09-17 00:04:06 +02:00
256e3f30ab Make USART writes non-blocking
The application should be the one to decide if a write should be blocking or not
2023-09-16 23:50:13 +02:00
7a660c29d2 Implement and validate all USARTs 2023-09-16 23:40:36 +02:00
dac751e466 Move DMA's tx buffer to a separate module 2023-09-16 18:53:50 +02:00
9f2b337abf Add additionnal param to DMA callbacks
This parameter is necessary for DMA tools to be implemented with minimal flash
usage as it allow the use of a single callback function for all purposes instead
of the need to add separate callback functions
2023-09-16 18:15:44 +02:00
b9285f2ab9 Document USART's private functions 2023-09-16 17:38:13 +02:00
fdc5f381f8 Got USART's TX via DMA working as intended
For now, USART's writes are blocking. This should be left to the application to
decide
2023-09-16 17:15:49 +02:00