Commit Graph

12 Commits

Author SHA1 Message Date
4464156981 Move DMA config to buffers
Control over most parameters is not needed since they cannot change for the
buffer to work as expected. Only the priority should be adjustable
2023-09-17 17:52:14 +02:00
d84d9cef83 Move DMA's rx buffer to a separate module 2023-09-17 17:36:24 +02:00
256e3f30ab Make USART writes non-blocking
The application should be the one to decide if a write should be blocking or not
2023-09-16 23:50:13 +02:00
7a660c29d2 Implement and validate all USARTs 2023-09-16 23:40:36 +02:00
dac751e466 Move DMA's tx buffer to a separate module 2023-09-16 18:53:50 +02:00
b9285f2ab9 Document USART's private functions 2023-09-16 17:38:13 +02:00
fdc5f381f8 Got USART's TX via DMA working as intended
For now, USART's writes are blocking. This should be left to the application to
decide
2023-09-16 17:15:49 +02:00
a66e5733e1 First try at implementing USART's TX
Unbuffered writes are working as intented. Buffering still needs work
2023-09-13 21:57:13 +02:00
f89fe12298 Add circular rx buffer management 2023-07-11 11:44:54 +02:00
46776ebfd3 Configure usart's rx with dma 2023-07-10 11:30:51 +02:00
26bb798b79 Add usart's read function 2023-07-05 23:05:03 +02:00
c8040cf62f Implement usart's basic function
This code doesn't work quite right yet, must most of the control system is in
place
2023-07-05 22:24:02 +02:00