fdc5f381f8
Got USART's TX via DMA working as intended
...
For now, USART's writes are blocking. This should be left to the application to
decide
2023-09-16 17:15:49 +02:00
a66e5733e1
First try at implementing USART's TX
...
Unbuffered writes are working as intented. Buffering still needs work
2023-09-13 21:57:13 +02:00
6269cf969a
Add critical section functions for DMAs
2023-09-13 21:56:30 +02:00
f89fe12298
Add circular rx buffer management
2023-07-11 11:44:54 +02:00
46776ebfd3
Configure usart's rx with dma
2023-07-10 11:30:51 +02:00
c571343de1
Fix usart's regs typo
2023-07-10 11:29:43 +02:00
43cdb55c48
Cleanup dma's configuration code
2023-07-10 11:29:07 +02:00
12c0b16b39
Cosmetic fixes
2023-07-10 11:14:46 +02:00
45452ce49e
Implement dma's basic functions
2023-07-10 11:13:36 +02:00
6ddc2266e1
Create dma's register map
2023-07-10 11:13:05 +02:00
dfccfd9591
Replace flash's bitfields with macros
2023-07-07 17:46:04 +02:00
ebe30a4a7a
Replace exti's bitfields with macros
2023-07-07 17:41:18 +02:00
26bb798b79
Add usart's read function
2023-07-05 23:05:03 +02:00
073be3f980
Fix macro parameter
2023-07-05 22:51:31 +02:00
c8040cf62f
Implement usart's basic function
...
This code doesn't work quite right yet, must most of the control system is in
place
2023-07-05 22:24:02 +02:00
9706979028
Apply new mask system to usart's regs
2023-07-05 22:23:53 +02:00
c1b3f0d073
Replace rcc's bitfields with macros
...
Bitfields can use byte acces, which the bus doesn't permit. When that happens,
the bus adds extra bytes to form a word, modifying fields that shouldn't be.
Bitfields can be kept for debug and read, but writes must be done though masks
2023-07-05 22:23:28 +02:00
aeba78cfcc
Create usart's register map
2023-05-18 13:49:53 +02:00
db5180d3e7
Document afio function
2023-05-13 15:48:07 +02:00
245b9238e9
Finish exti's implementation
2023-05-13 15:42:59 +02:00
3906a79315
Implement afio's control functions
2023-05-13 15:42:38 +02:00
9052aac1b3
Create afio's register map
2023-05-13 15:42:11 +02:00
c7deded9b2
Implement exti's control functions
2023-05-13 14:17:32 +02:00
a99b4ad0de
Create exti's register map
2023-05-13 14:17:03 +02:00
8dc58b6747
Add peripheral-wide reset function for gpios
2023-05-13 13:27:51 +02:00
f0da0cd05c
Fix gpio configuration mask not properly applied
2023-05-08 21:19:46 +02:00
0034dea774
Make gpio writes atomic
2023-05-08 21:03:52 +02:00
c44dc87f43
Implement gpio's control functions
2023-05-08 21:01:31 +02:00
2f40111dbb
Create gpio's register map
2023-05-08 20:53:30 +02:00
16fbf892ba
Fix bitwise negations using the boolean operator
2023-05-08 20:52:18 +02:00
1d8ccfdfca
Fix rcc enum
2023-05-07 19:28:01 +02:00
661f4a0ae5
Implement nvic's control functions
2023-04-27 21:12:05 +02:00
691b360eb1
Create nvic's register map
2023-04-27 21:12:00 +02:00
c10ef4d2f1
Merge peripheral control functions
...
The functions are very simple and their number complicates the API more
than anything, so we better merge them
2023-03-31 23:32:43 +02:00
2d83ce9f05
Implement AHB peripherals control functions
2023-03-31 23:22:11 +02:00
ca935a7650
Rework comments
...
Avoid repitions between comments and code. Additionnal usage information
can be added as header comment and additionnal technical information can
be added in the source file
2023-03-31 14:17:39 +02:00
a101f07009
Implement peripheral control functions
2023-03-31 14:04:36 +02:00
3a768d9190
Implement Flash configuration
2023-03-26 21:07:37 +02:00
7f7cb077dc
Create flash register map
2023-03-24 19:05:43 +01:00
dd6d5fbdd1
Implement RCC's clock configuration
...
For now, flash configuration is hard-coded. This will fixed in future
commits
2023-03-22 23:30:29 +01:00
50dc10b76e
Create RCC register map
2023-03-19 21:57:37 +01:00
